From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3F32E387346 for ; Tue, 14 Apr 2026 16:50:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776185435; cv=none; b=Abs/m/Hp2t7IQGoS08B3KCK2+kivv80m+M6WN/BEhEkG2hVQAn86l/4S8ADcWZpUAJQR1QsJVR5w9i+4+5EFDFT0D2sTapceYUMHWo5rkhtyVo6Wg1DpgnE22DeZvxLov0AlvRjPSqGXXAudWF+gN9MK/bxs3vG0qp+ItG7XMuI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776185435; c=relaxed/simple; bh=I0IRdQWChhwRN6t2vsCKAaqrPRW/S9ofOt/f00Ppi+c=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=R098An7+zdehWP12jKEEis3lsKnhiiKCuOhnE4duWNYLh6yS6kaKPfbxDln3SI09UpC2eZuzIBAsvQ6kuE08zq2LuwNZjl0sYBsBbVIPHuI4syo5adZFtCWoaEY+jGb80frn38Un9KhwlsNTKiim5QEQW9K2di+/iQMPc5ZRm+s= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=cSg60PCo; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="cSg60PCo" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A70FD4519; Tue, 14 Apr 2026 09:50:27 -0700 (PDT) Received: from e129823.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D24F03F641; Tue, 14 Apr 2026 09:50:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1776185433; bh=I0IRdQWChhwRN6t2vsCKAaqrPRW/S9ofOt/f00Ppi+c=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=cSg60PCo+IhSK7QVHCR5b+Bd0TWonb6s/g5qmtXEN1hv9Wy2Vu9fdzNnLxPUhDm/Y wqcBaveiz4zGdDc9Kb5iIxBbKveKPouA6we7TkZbeLxmrae332y/J6SpEkddHRPbT6 0svmouJRuFBC1gcsPTAshcydvqju9Ut5ZZuLMcRY= Date: Tue, 14 Apr 2026 17:50:29 +0100 From: Yeoreum Yun To: Leo Yan Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, suzuki.poulose@arm.com, mike.leach@arm.com, james.clark@linaro.org, alexander.shishkin@linux.intel.com, jie.gan@oss.qualcomm.com Subject: Re: [PATCH v4 3/9] coresight: etm4x: fix leaked trace id Message-ID: References: <20260413142003.3549310-1-yeoreum.yun@arm.com> <20260413142003.3549310-4-yeoreum.yun@arm.com> <20260414163221.GG356832@e132581.arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260414163221.GG356832@e132581.arm.com> Hi, > On Mon, Apr 13, 2026 at 03:19:56PM +0100, Yeoreum Yun wrote: > > If etm4_enable_sysfs() fails in cscfg_csdev_enable_active_config(), > > the trace ID may be leaked because it is not released. > > > > To address this, call etm4_release_trace_id() when etm4_enable_sysfs() > > fails in cscfg_csdev_enable_active_config(). > > > > Signed-off-by: Yeoreum Yun > > --- > > drivers/hwtracing/coresight/coresight-etm4x-core.c | 4 +++- > > 1 file changed, 3 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c > > index 8ebfd3924143..1bc9f13e33f7 100644 > > --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c > > +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c > > @@ -918,8 +918,10 @@ static int etm4_enable_sysfs(struct coresight_device *csdev, struct coresight_pa > > cscfg_config_sysfs_get_active_cfg(&cfg_hash, &preset); > > if (cfg_hash) { > > ret = cscfg_csdev_enable_active_config(csdev, cfg_hash, preset); > > - if (ret) > > + if (ret) { > > + etm4_release_trace_id(drvdata); > > I am not familiar with the trace ID, seems to me, it just allocate a ID > for each tracer from the ID map and then always use this cached ID for > the tracers. > > If so, even an ID is reserved for failures, and the ID map is big enough > for each CPU, we don't need to worry memory leak or ID used out issue ? > Agree. Practically, this is not a big issue and I don't think because of this new id couldn't be allocated in 128 although the one id is occupied by cpu while source is disabled. However, in theory, this could lead to an ID leak, so it would be better to release it in error cases. [...] -- Sincerely, Yeoreum Yun