From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 09D3835F184 for ; Wed, 8 Apr 2026 09:02:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775638973; cv=none; b=NLciViWikJz5FHCStOGF/rCmQZ2j/lOiTq02ou2JmLFhVm7Th2nQEzGkC3wPqJkITY0vALDDTE14wcWMJT3Jk7FKLjo93ajucC/ouGy/2gxz0GlIojMunQyvJECVhIrkfKVNB+JcNOzM2pc8pfwbcmf48cvVoRZmricccPV7EPU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775638973; c=relaxed/simple; bh=MwIZpurKIaK2YuB/c3NPv24N8boUyLW1J76Veiv9B6w=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=A+b8H4KXFgoiu+IrBLq+rw2cigeevey0nFv2NQ9mK+uVhX68qyZTBlnvgblrUD/38LSGH2+bW/ISxYQb+a8nmXc0DBnc8dXGlLqBuVzxt6P3ZEcPTelHRcGOfjKq5B9kaHcIPH+WmD6vQtIjnIPNtV5JifSsTaXJpyYdYEzdXME= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=XTIObpTI; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="XTIObpTI" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BED6B267F; Wed, 8 Apr 2026 02:02:40 -0700 (PDT) Received: from J2N7QTR9R3 (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0E8BE3F632; Wed, 8 Apr 2026 02:02:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1775638966; bh=MwIZpurKIaK2YuB/c3NPv24N8boUyLW1J76Veiv9B6w=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=XTIObpTILIdqTFIxZapH4Zhoi4927Ed25qDNcejFd4Be4QwwJeKqxj7IGMtzWLwTy yYfi4iZmQ3+2R3ChD60rcq0IhFeg7HnGJnMXZkHsOxxwwFYEMmXNgdXHordtqSlCHG ywQp2K4YTv4njF9WypfM/9i7ApTug3feRvUx5RRI= Date: Wed, 8 Apr 2026 10:02:28 +0100 From: Mark Rutland To: Thomas Gleixner , Catalin Marinas , Will Deacon Cc: linux-arm-kernel@lists.infradead.org, Andy Lutomirski , Peter Zijlstra , ada.coupriediaz@arm.com, linux-kernel@vger.kernel.org, ruanjinjie@huawei.com, vladimir.murzin@arm.com Subject: Re: [PATCH 00/10] arm64/entry: Message-ID: References: <20260407131650.3813777-1-mark.rutland@arm.com> <87cy0a4gx7.ffs@tglx> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <87cy0a4gx7.ffs@tglx> On Tue, Apr 07, 2026 at 11:08:36PM +0200, Thomas Gleixner wrote: > On Tue, Apr 07 2026 at 14:16, Mark Rutland wrote: > > I've split the series into a prefix of changes for generic irqentry, > > followed by changes to the arm64 code. I'm hoping that we can queue the > > generic irqentry patches onto a stable branch, or take those via arm64. > > The patches are as follows: > > > > * Patches 1 and 2 are cleanup to the generic irqentry code. These have no > > functional impact, and I think these can be taken regardless of the > > rest of the series. > > > > * Patches 3 to 5 refactor the generic irqentry code as described above, > > providing separate irqentry_{enter,exit}() functions and providing a > > split form of irqentry_exit_to_kernel_mode() similar to what exists > > for irqentry_exit_to_user_mode(). These patches alone should have no > > functional impact. > > I looked through them and I can't find any problem with them. I queued > them localy and added the missing kernel doc as I promised you on IRC. Thanks! Much appreciated! > As I have quite a conflict pending in the tip tree with other changes > related to the generic entry code, I suggest that I queue 1-5, tag them > for arm64 consumption and merge them into the conflicting branch to > avoid trouble with pull request ordering and headaches for the -next > people. > > Does that work for you? That sounds good to me. Catalin, Will, does that work for you? Mark.