From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.3 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33B06C433E0 for ; Wed, 3 Mar 2021 19:09:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D017860295 for ; Wed, 3 Mar 2021 19:09:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1578541AbhCCSRf (ORCPT ); Wed, 3 Mar 2021 13:17:35 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:53610 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S236607AbhCCQPe (ORCPT ); Wed, 3 Mar 2021 11:15:34 -0500 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 123FwEbn019267; Wed, 3 Mar 2021 17:12:10 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=subject : to : cc : references : from : message-id : date : mime-version : in-reply-to : content-type : content-transfer-encoding; s=selector1; bh=oBSCDr6pumMwSnGjMzBLCyN+aCiMW9l6k6rqZVXJZes=; b=Sffuk4F0omnhhqQs067z32mOava1pBdl9ucUV/nkNIvDmNfFWpRvE3TWp5LmICU4J3L5 KuXSOsQsIVU8ltoGaunltqhVK+ZuSy6w7XWfBVP9iZkgjfVi8PiazbdgD7Y9wfb7MXEN vjo+/ZTLUK2XC2z1+XnI5jMoZYvoYEkXcpaBUsY6fTCpbJABbVp6KMwUnHUn2wlJEc4g cf2NrzpF+pdQji7F7muYRDXK24Ayu+D/39h4LnKfYxj35mUykhKIEBgRCIxg9TD0NQHC h2k03Tm66SI0ddsWRPOa7lCi5yzi0kGpztrjlORCR5gTUIlqK045c/VqocMMB7BCCZ6E IA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 36yf9q9xvf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 03 Mar 2021 17:12:10 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id C0039100034; Wed, 3 Mar 2021 17:12:09 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag2node3.st.com [10.75.127.6]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id AA90E252AEC; Wed, 3 Mar 2021 17:12:09 +0100 (CET) Received: from [10.211.2.167] (10.75.127.48) by SFHDAG2NODE3.st.com (10.75.127.6) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 3 Mar 2021 17:12:00 +0100 Subject: Re: [PATCH] counter: stm32-timer-cnt: fix ceiling write max value To: William Breathitt Gray CC: , , , , , , , , References: <1614696235-24088-1-git-send-email-fabrice.gasnier@foss.st.com> From: Fabrice Gasnier Message-ID: Date: Wed, 3 Mar 2021 17:11:59 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG2NODE1.st.com (10.75.127.4) To SFHDAG2NODE3.st.com (10.75.127.6) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369,18.0.761 definitions=2021-03-03_05:2021-03-03,2021-03-03 signatures=0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 3/3/21 12:42 AM, William Breathitt Gray wrote: > On Tue, Mar 02, 2021 at 06:03:25PM +0100, Fabrice Gasnier wrote: >> On 3/2/21 3:56 PM, William Breathitt Gray wrote: >>> Side question: if priv->ceiling is tracking the current ceiling >>> configuration, would it make sense to change stm32_count_ceiling_read() >>> to print the value of priv->ceiling instead of doing a regmap_read() >>> call? >> >> Hi William, >> >> Thanks for reviewing. >> >> I'd be fine either way. So no objection to move to the priv->ceiling >> (cached) value. It could also here here. >> By looking at this, I figured out there's probably another thing to fix >> here, for initial conditions. >> >> At probe time priv->ceiling is initialized to max value (ex 65535 for a >> 16 bits counter). But the register content is 0 (clear by mfd driver at >> probe time). >> >> - So, reading ceiling from sysfs currently reports 0 (regmap_read()) >> after booting and probing. >> >> I see two cases at this point: >> - In case the counter gets enabled without any prior configuration, it >> won't count: ceiling value (e.g. 65535) should be written to register >> before it is enabled, so the counter will actually count. So there's >> room for a fix here. >> >> - In case function gets set (ex: quadrature x4), priv->ceiling (e.g. >> 65535) gets written to the register (although it's been read earlier as >> 0 from sysfs). >> This could be fixed by reading the priv->ceiling in >> stm32_count_ceiling_read() as you're asking (provided 1st case has been >> fixed as well) >> >> I'll probably prepare one or two patches for the above cases, if you agree ? >> >> Best Regards, >> Fabrice > > Looking through the driver, it doesn't seem like priv->ceiling is used > in any performance critical code, just the callbacks for count_write() > and function_set(). It might make more sense to remove priv->ceiling and > replace it with the regmap_read() calls where necessary so that we > always get the most current ceiling value from the device when needed. Hi William, Ok, I'll look into this. > > As for the default ceiling value for the device at probe time, this > should probably be set to the max value because that is what a normal > user would expect when loading a Counter driver (a ceiling value of 0 at > startup is somewhat unintuitive). Yes, I agree. In fact, the default (reset) value is the maximum. The 0 value is forced in ARR register by the mfd driver [1], after reading the max_arr value. I see no rationale for this. I think the fix should probably be done there: I'd prefer to backup and restore ARR value in the mfd, instead of unconditionally clearing it. [1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/drivers/mfd/stm32-timers.c?h=v5.11#n167 > > If you prepare those two patches, then that should resolve this. I'll prepare this. Thanks for your advices, Best Regards, Fabrice > > William Breathitt Gray >