Re: [PATCH v1 3/5] ASoC: codec: pcm1681: Enable system clock before regmap access

[Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>]

On 9/8/2026 10:56 PM, Mark Brown wrote:
> On Mon, Sep 07, 2026 at 11:39:44PM +0530, Mohammad Rafi Shaik wrote:
>> The PCM1681 DAC requires the SCK (system clock) input to be
>> present for proper device operation. On platforms where SCK
>> is provided by a controllable clock source, register accesses
>> over I2C may fail when the clock is not enabled.
> 
>> @@ -311,6 +313,22 @@ static int pcm1681_i2c_probe(struct i2c_client *client)
>>   	if (!priv)
>>   		return -ENOMEM;
>>   
>> +	priv->sclk = devm_clk_get_optional(&client->dev, "sck");
>> +	if (IS_ERR(priv->sclk))
>> +		return dev_err_probe(&client->dev, PTR_ERR(priv->sclk),
>> +				     "Failed to get sck\n");
>> +
>> +	ret = clk_prepare_enable(priv->sclk);
>> +	if (ret)
>> +		return dev_err_probe(&client->dev, ret,
>> +				     "Failed to enable sck\n");
> 
> It looks like the device needs a delay after the clock is enabled before
> the register interface is available (see 8.3.2 of
> https://www.ti.com/lit/ds/symlink/pcm1681-q1.pdf).

Thanks Mark, for pointing this out.

Yes, based on the datasheet, I can see that the device requires a 
Power-On Reset period of 65,536 system clock cycles before the register 
interface becomes available.

Although audio functionality working fine without this delay in my 
testing, I seem to have overlooked this requirement.

I will verify the behavior and update the driver to include the proper 
delay configuration as specified in the datasheet.

Best regard's
Rafi.