From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6CAFCC7EE30 for ; Fri, 3 Mar 2023 21:25:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231533AbjCCVZU (ORCPT ); Fri, 3 Mar 2023 16:25:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36060 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231666AbjCCVZP (ORCPT ); Fri, 3 Mar 2023 16:25:15 -0500 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E96186230C for ; Fri, 3 Mar 2023 13:25:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1677878706; x=1709414706; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=YMZDRR+PM05c4rv4SQCyz2WYSDg/ciTluk55719hYjc=; b=BgooRcUc/yyIkM+WljK8BQDfiidm8Pb3WASNpgWLdjj3O/iO4M5iRqL3 WXccUUrNaWK8pGztnKRqJflC5Am5oFMygfBjUANEDymoLFHymML3N0FaJ 3f1vxkr6JoOBm4BClije3m6vVCxpsAJCDJLgzy9ZenjCpU35sNV5AOBt5 MeFktKW0ffxuH05FL4CqYAxxx0xgAhfKHGNtH3z+lFY/Cb7H2NOcPY7vL DtRi4oXLCrtP7AqnGNcMXm6Sy4/eprNGNi3DYQ/xGtqDQwTS0u6xg9v1+ jVSZL2if95Udqm4aOtfmELqXipEUyog/pUHlR3N8ph9XBtX13cN/t96fN w==; X-IronPort-AV: E=McAfee;i="6500,9779,10638"; a="362759554" X-IronPort-AV: E=Sophos;i="5.98,231,1673942400"; d="scan'208";a="362759554" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Mar 2023 13:24:54 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10638"; a="785429320" X-IronPort-AV: E=Sophos;i="5.98,231,1673942400"; d="scan'208";a="785429320" Received: from ctretbar-mobl.amr.corp.intel.com (HELO [10.212.170.209]) ([10.212.170.209]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Mar 2023 13:24:54 -0800 Message-ID: Date: Fri, 3 Mar 2023 13:24:53 -0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1 Subject: Re: [PATCH] x86/mm: Do not shuffle CPU entry areas without KASLR Content-Language: en-US To: =?UTF-8?Q?Michal_Koutn=c3=bd?= , linux-kernel@vger.kernel.org, x86@kernel.org Cc: Dave Hansen , Andy Lutomirski , Peter Zijlstra , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" References: <20230303160645.3594-1-mkoutny@suse.com> From: Dave Hansen In-Reply-To: <20230303160645.3594-1-mkoutny@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 3/3/23 08:06, Michal Koutný wrote: > @@ -29,6 +30,12 @@ static __init void init_cea_offsets(void) > unsigned int max_cea; > unsigned int i, j; > > + if (!kaslr_memory_enabled()) { > + for_each_possible_cpu(i) > + per_cpu(_cea_offset, i) = i; > + return; > + } Should this be kaslr_memory_enabled() or kaslr_enabled()? The delta seems to be CONFIG_KASAN, and the cpu entry area randomization works just fine with KASAN after some recent fixes. I _think_ that makes cpu entry area randomization more like module randomization which would point toward kaslr_enabled().