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From: Xiaoyao Li <xiaoyao.li@intel.com>
To: Sean Christopherson <seanjc@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	"Chao Gao" <chao.gao@intel.com>,
	"Markku Ahvenjärvi" <mankku@gmail.com>,
	"Janne Karhunen" <janne.karhunen@gmail.com>
Subject: Re: [PATCH v2 2/2] KVM: nVMX: Defer SVI update to vmcs01 on EOI when L2 is active w/o VID
Date: Thu, 28 Nov 2024 11:53:49 +0800	[thread overview]
Message-ID: <adf9d3a0-3134-425b-89e7-0a6881cdcc6c@intel.com> (raw)
In-Reply-To: <20241128000010.4051275-3-seanjc@google.com>

On 11/28/2024 8:00 AM, Sean Christopherson wrote:
> +void kvm_apic_update_hwapic_isr(struct kvm_vcpu *vcpu)
> +{
> +	struct kvm_lapic *apic = vcpu->arch.apic;
> +
> +	if (WARN_ON_ONCE(!lapic_in_kernel(vcpu)) || !apic->apicv_active)
> +		return;
> +
> +	kvm_x86_call(hwapic_isr_update)(apic->vcpu, apic_find_highest_isr(apic));

Nit:

we have @vcpu already, no need to grab it from apic->vcpu.

> +}
> +EXPORT_SYMBOL_GPL(kvm_apic_update_hwapic_isr);


  reply	other threads:[~2024-11-28  3:53 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-28  0:00 [PATCH v2 0/2] KVM: nVMX: Fix an SVI update bug with passthrough APIC Sean Christopherson
2024-11-28  0:00 ` [PATCH v2 1/2] KVM: x86: Plumb in the vCPU to kvm_x86_ops.hwapic_isr_update() Sean Christopherson
2024-11-28  0:00 ` [PATCH v2 2/2] KVM: nVMX: Defer SVI update to vmcs01 on EOI when L2 is active w/o VID Sean Christopherson
2024-11-28  3:53   ` Xiaoyao Li [this message]
2024-12-19  2:41 ` [PATCH v2 0/2] KVM: nVMX: Fix an SVI update bug with passthrough APIC Sean Christopherson

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