From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 66F8C1DDC1D; Fri, 10 Apr 2026 04:30:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.16 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775795413; cv=none; b=QpxGk7p0OTrk5LC1AWII7ViL1E7tPcssLeQyeBdUp1fpZVEh5LuoNNXdF4c4M3bHdjL3m9nfzLTJd4/+snhisqLGB7fB60TrCdvsHHjLvpW1sFXolK6pmQ27PUnt1HTQJDQi7OudgPK3CpTXj4T8WQ8hx5CdFgRyvNcBDXq7LlU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775795413; c=relaxed/simple; bh=E2tBxPoGe0UebbQKZ9igq7LhqepE3z5qs+//xgKlCaM=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=evXUvoiowhPy9w8afGwHWVgkUHtLz33hQSaolViR2lqcP2UgbuJehlvXasekviLgoW5YIwvb/EzJEaA4V5MDBWZpukH14IiXXdUlF12/Ty1upB1EpNaq+vNdkZRUK1WcLhjyLP/9LAvw2vLFO7WvnOKjCkh3zcOC22spowhJlS0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=XeXqsfDu; arc=none smtp.client-ip=198.175.65.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="XeXqsfDu" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1775795411; x=1807331411; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=E2tBxPoGe0UebbQKZ9igq7LhqepE3z5qs+//xgKlCaM=; b=XeXqsfDufORmlzY1wZKPJee8gV5GaoPJ1rBAHacTkR5RiOq70xzJDSSp 83d7dU2AEoidWKwEe/MiYvSR4IjWkzEvpApDKCHbSBYOIe0twZIeRuOF2 jC9n678o7s9DMT1LEVJwlmmlzt4bQAqBfI2MjrnD71aq+2HJrC5WO+F2B OhIrhADYj8ilYzFuPW7B+Kz2gCF1hzrtSxPdsEX9pPRs5CzuiF+eslRoJ TIqFsjXERGiqfsrOjrNFiNNXcujjHEUXiKCnKgXWRkICyncdtodvc6AGn zJST19k7ixEmZDMtmT8hxH1HHA2cgN10i6Ha2WoQUuiJRMy0TZDIIe9Yr Q==; X-CSE-ConnectionGUID: gNEbreKgSraKOB6FPAiSAw== X-CSE-MsgGUID: FhQvVPM5RSGCuQVXnJMvWA== X-IronPort-AV: E=McAfee;i="6800,10657,11754"; a="76995825" X-IronPort-AV: E=Sophos;i="6.23,170,1770624000"; d="scan'208";a="76995825" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2026 21:30:10 -0700 X-CSE-ConnectionGUID: HYUEcDfNT0GkKzq6nZgiag== X-CSE-MsgGUID: Ww+YmwTZTySkE7b2NNd4Ag== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,170,1770624000"; d="scan'208";a="266948073" Received: from pgcooper-mobl3.ger.corp.intel.com (HELO localhost) ([10.245.244.51]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2026 21:30:08 -0700 Date: Fri, 10 Apr 2026 07:30:04 +0300 From: Andy Shevchenko To: Joshua Crofts Cc: David Laight , lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org, greghk@linuxfoundation.org, dlechner@baylibre.com, nono.sa@analog.com, andy@kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev Subject: Re: [PATCH] iio: frequency: ad983x: replace do_div() with div64_ul(). Message-ID: References: <20260409131823.1289-1-joshua.crofts1@gmail.com> <20260409182755.499a419c@pumpkin> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo On Thu, Apr 09, 2026 at 09:58:20PM +0200, Joshua Crofts wrote: > On Thu, 9 Apr 2026 at 19:27, David Laight wrote: > > Except here you have clock frequencies. > > Either they fit in 32bits or they don't. > > So the value shouldn't be 'unsigned long', but either u32 or u64. > > The clk struct in linux/clk.h explicitly uses an unsigned long to represent > the clock value, which is used in this driver. Using an unsigned long > ensures platform independent usage without type mismatching. ...which effectively means the frequency most likely fits 32-bit. Otherwise would it ever work on 32-bit platform? This is a mistake in CLK design. > > You need to check the domain of the values, coccinelle is just looking > > at the types. > > Even with mclk being 'unsigned long' the code is fine provided the > > frequency is below 4.2GHz. > > I agree that we're not dealing with potential truncation problems, however > changing to div64_ul aligns the types with the clk API and scrubs a perfectly > valid cocci error. -- With Best Regards, Andy Shevchenko