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From: <Dharma.B@microchip.com>
To: <claudiu.beznea@tuxon.dev>, <Nicolas.Ferre@microchip.com>,
	<alexandre.belloni@bootlin.com>,
	<Varshini.Rajendran@microchip.com>
Cc: <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] drivers: soc: atmel: fix the args passed to AT91_SOC
Date: Sat, 15 Feb 2025 17:40:26 +0000	[thread overview]
Message-ID: <ae01d358-308c-43fc-9f23-ef20f1cee54d@microchip.com> (raw)
In-Reply-To: <ee14c4ef-04d9-488a-8304-75d9401b76c5@tuxon.dev>

Hi Claudiu,

On 15/02/25 10:27 pm, Claudiu Beznea wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Hi, Dharma,
> 
> On 12.01.2025 06:41, Dharma Balasubiramani wrote:
>> fix the arguments passed to the AT91_SOC for SAM9X75 SiP.
>>
>> Fixes: 5eb64f2b368f ("ARM: at91: add support in SoC driver for new sam9x7")
>> Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com>
>> ---
>>   drivers/soc/atmel/soc.c | 16 ++++++++--------
>>   1 file changed, 8 insertions(+), 8 deletions(-)
>>
>> diff --git a/drivers/soc/atmel/soc.c b/drivers/soc/atmel/soc.c
>> index 298b542dd1c0..273c1420fd40 100644
>> --- a/drivers/soc/atmel/soc.c
>> +++ b/drivers/soc/atmel/soc.c
>> @@ -111,17 +111,17 @@ static const struct at91_soc socs[] __initconst = {
>>        AT91_SOC(SAM9X7_CIDR_MATCH, AT91_CIDR_MATCH_MASK,
>>                 AT91_CIDR_VERSION_MASK, SAM9X75_EXID_MATCH,
>>                 "sam9x75", "sam9x7"),
>> -     AT91_SOC(SAM9X7_CIDR_MATCH, SAM9X75_D1M_EXID_MATCH,
>> -              AT91_CIDR_VERSION_MASK, SAM9X75_EXID_MATCH,
>> +     AT91_SOC(SAM9X7_CIDR_MATCH, AT91_CIDR_MATCH_MASK,
>> +              AT91_CIDR_VERSION_MASK, SAM9X75_D1M_EXID_MATCH,
> 
> As of [1], chapter 37.6.11. DBGU Chip ID Register, the chip id is on bits
> 30..0. AT91_CIDR_MATCH_MASK is defined as

Thanks for pointing out that.

> 
> #define AT91_CIDR_MATCH_MASK            GENMASK(30, 5)
> 
> Is there something wrong in [1] ?

No,
I see at91rm9200, sama5d2 has first 4 bits reserved for version (3 for 
gallardo) but not for sam9x60 and sam9x7 (entire 30 bits is reserved for 
CHID and 31st bit for EXTID).

should fix that.
> 
> Thank you,
> Claudiu
> 
> [1]
> https://ww1.microchip.com/downloads/aemDocuments/documents/MPU32/ProductDocuments/DataSheets/SAM9X7-Series-Data-Sheet-DS60001813.pdf
> 
>>                 "sam9x75 16MB DDR2 SiP", "sam9x7"),
>> -     AT91_SOC(SAM9X7_CIDR_MATCH, SAM9X75_D5M_EXID_MATCH,
>> -              AT91_CIDR_VERSION_MASK, SAM9X75_EXID_MATCH,
>> +     AT91_SOC(SAM9X7_CIDR_MATCH, AT91_CIDR_MATCH_MASK,
>> +              AT91_CIDR_VERSION_MASK, SAM9X75_D5M_EXID_MATCH,
>>                 "sam9x75 64MB DDR2 SiP", "sam9x7"),
>> -     AT91_SOC(SAM9X7_CIDR_MATCH, SAM9X75_D1G_EXID_MATCH,
>> -              AT91_CIDR_VERSION_MASK, SAM9X75_EXID_MATCH,
>> +     AT91_SOC(SAM9X7_CIDR_MATCH, AT91_CIDR_MATCH_MASK,
>> +              AT91_CIDR_VERSION_MASK, SAM9X75_D1G_EXID_MATCH,
>>                 "sam9x75 125MB DDR3L SiP ", "sam9x7"),
>> -     AT91_SOC(SAM9X7_CIDR_MATCH, SAM9X75_D2G_EXID_MATCH,
>> -              AT91_CIDR_VERSION_MASK, SAM9X75_EXID_MATCH,
>> +     AT91_SOC(SAM9X7_CIDR_MATCH, AT91_CIDR_MATCH_MASK,
>> +              AT91_CIDR_VERSION_MASK, SAM9X75_D2G_EXID_MATCH,
>>                 "sam9x75 250MB DDR3L SiP", "sam9x7"),
>>   #endif
>>   #ifdef CONFIG_SOC_SAMA5
>>
>> ---
>> base-commit: 2b88851f583d3c4e40bcd40cfe1965241ec229dd
>> change-id: 20250112-atmel-soc-40c4b40c9b68
>>
>> Best regards,
> 


-- 
With Best Regards,
Dharma B.

      reply	other threads:[~2025-02-15 17:42 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-12  4:41 Dharma Balasubiramani
2025-02-03 10:36 ` Varshini.Rajendran
2025-02-15 16:57 ` Claudiu Beznea
2025-02-15 17:40   ` Dharma.B [this message]

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