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[213.44.230.108]) by smtp.gmail.com with ESMTPSA id d15-20020a056000186f00b0020384249361sm6603079wri.104.2022.03.18.01.34.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 18 Mar 2022 01:34:20 -0700 (PDT) Message-ID: Date: Fri, 18 Mar 2022 09:34:19 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH 2/3] drm: bridge: it66121: Fix the register page length Content-Language: en-US To: Nicolas Belin , andrzej.hajda@intel.com, robert.foss@linaro.org Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com References: <20220316135733.173950-1-nbelin@baylibre.com> <20220316135733.173950-3-nbelin@baylibre.com> From: Neil Armstrong Organization: Baylibre In-Reply-To: <20220316135733.173950-3-nbelin@baylibre.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 16/03/2022 14:57, Nicolas Belin wrote: > Set the register page length or window length to > 0x100 according to the documentation. > > Fixes: 988156dc2fc9 ("drm: bridge: add it66121 driver") > Signed-off-by: Nicolas Belin > --- > drivers/gpu/drm/bridge/ite-it66121.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/bridge/ite-it66121.c b/drivers/gpu/drm/bridge/ite-it66121.c > index 06b59b422c69..64912b770086 100644 > --- a/drivers/gpu/drm/bridge/ite-it66121.c > +++ b/drivers/gpu/drm/bridge/ite-it66121.c > @@ -227,7 +227,7 @@ static const struct regmap_range_cfg it66121_regmap_banks[] = { > .selector_mask = 0x1, > .selector_shift = 0, > .window_start = 0x00, > - .window_len = 0x130, > + .window_len = 0x100, > }, > }; > The documentation we have access to at [1] is confusing: Reg00 ~ Reg2F are accessible in any register bank. Reg30~ RegFF are accessible in register bank0 Reg130~ Reg1BF are accessible in register bank1. These are HDMI packet registers. But indeed it means: - Reg00 ~ Reg2F: are always accessible, whether bank0 or bank1 is set - Reg30~ RegFF: only when bank0 is set - Reg130~ Reg1BF: only when bank0 is set at Reg30~ RegF range So 0x100 is the right window_len here. Acked-by: Neil Armstrong [1] https://rockchip.fr/radxa/IT66121_Register_List_Release_V1.0.pdf