From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752832AbdJ0WeL (ORCPT ); Fri, 27 Oct 2017 18:34:11 -0400 Received: from aserp1040.oracle.com ([141.146.126.69]:22650 "EHLO aserp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751221AbdJ0WeK (ORCPT ); Fri, 27 Oct 2017 18:34:10 -0400 Subject: Re: [PATCH v2] xen: support 52 bit physical addresses in pv guests To: Juergen Gross , linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, x86@kernel.org Cc: hpa@zytor.com, tglx@linutronix.de, mingo@redhat.com References: <20171027174937.26980-1-jgross@suse.com> From: Boris Ostrovsky Message-ID: Date: Fri, 27 Oct 2017 18:33:44 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: <20171027174937.26980-1-jgross@suse.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Source-IP: userv0021.oracle.com [156.151.31.71] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/27/2017 01:49 PM, Juergen Gross wrote: > Physical addresses on processors supporting 5 level paging can be up to > 52 bits wide. For a Xen pv guest running on such a machine those > physical addresses have to be supported in order to be able to use any > memory on the machine even if the guest itself does not support 5 level > paging. > > So when reading/writing a MFN from/to a pte don't use the kernel's > PTE_PFN_MASK but a new XEN_PTE_MFN_MASK allowing full 40 bit wide MFNs. > > Signed-off-by: Juergen Gross Reviewed-by: Boris Ostrovsky