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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: pZWX_6iUzx085jY2PrIKqfORsvLSpYob X-Proofpoint-ORIG-GUID: pZWX_6iUzx085jY2PrIKqfORsvLSpYob X-Authority-Analysis: v=2.4 cv=Z4Dh3XRA c=1 sm=1 tr=0 ts=68ff55b3 cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=os7cmxGP5G+7zi0Bb7vKnA==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=9kjh7eMwnbizjImSWngA:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDI3MDEwNSBTYWx0ZWRfXyi6cfWJgoNb+ uyR2OJobJweToBpgNXiiJ5+jMcvVWoEDWoP0AsV8RaceXr16fjTb1rqJ5XVWNVPnKclAgBptCBY YeUIOxDqho9Nj2YMPDUKPp/4mvI3gf6mSdm3qgcrvbBsByL0ff+ZWV0o9SN+vahTzmxAadrqkow ahTK1iToIt9zsIlczdlE8LWNEYR0T1SCtD4jWZBP/ffVUdvuVMgEIaZ7AT/WVC6XU0tDtBskUgp hHiV/HvhJIKo7Wnlpz7bzbZO5TEslk/xRp9wkW/gLbDB6pYtH1LnofNSZDRtwFikb2nR3Yo63OB Pc0Bm2mzO03e/57tL7GrsaJ5RktTxrL1h89wPqpCOUjCp5eEjpYcbaMZfammTs5OKoBoaeIQFdR RSD4Le+DuM07meNtFDzf1QSxRVLslg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-27_05,2025-10-22_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 spamscore=0 priorityscore=1501 malwarescore=0 bulkscore=0 adultscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510020000 definitions=main-2510270105 On 10/27/2025 2:06 PM, Konrad Dybcio wrote: > On 10/24/25 8:21 PM, Krishna Kurapati wrote: >> Enable OTG support for primary USB controller on EVK Platform. Add >> HD3SS3220 Type-C port controller present between Type-C port and SoC >> that provides role switch notifications to controller. >> >> Signed-off-by: Krishna Kurapati >> --- >> Changes in v3: >> - Moved "usb-role-switch" to lemans dtsi file >> - Moved vbus supply to connector node >> >> Link to v3 bindings and driver support: >> https://lore.kernel.org/all/20251024181832.2744502-1-krishna.kurapati@oss.qualcomm.com/ >> >> Link to v2: >> https://lore.kernel.org/all/20251008180036.1770735-1-krishna.kurapati@oss.qualcomm.com/ >> >> arch/arm64/boot/dts/qcom/lemans-evk.dts | 122 +++++++++++++++++++++++- >> arch/arm64/boot/dts/qcom/lemans.dtsi | 1 + >> 2 files changed, 121 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/qcom/lemans-evk.dts b/arch/arm64/boot/dts/qcom/lemans-evk.dts >> index c7dc9b8f4457..2baad2612b16 100644 >> --- a/arch/arm64/boot/dts/qcom/lemans-evk.dts >> +++ b/arch/arm64/boot/dts/qcom/lemans-evk.dts >> @@ -37,6 +37,35 @@ chosen { >> stdout-path = "serial0:115200n8"; >> }; >> >> + connector0 { > > "connector-0" > > [...] > ACK. >> + vbus_supply_regulator_0: vbus-supply-regulator-0 { > > Other regulators (as can be seen in the diff context below) are > named regulator-xyz-abc, please follow > ACK. >> + compatible = "regulator-fixed"; >> + regulator-name = "vbus_supply_0"; >> + gpio = <&expander1 2 GPIO_ACTIVE_HIGH>; >> + regulator-min-microvolt = <5000000>; >> + regulator-max-microvolt = <5000000>; >> + enable-active-high; >> + }; >> + >> vmmc_sdc: regulator-vmmc-sdc { >> compatible = "regulator-fixed"; > > [...] > >> &usb_0 { >> - dr_mode = "peripheral"; >> - >> status = "okay"; >> + >> + ports { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + port@0 { >> + reg = <0>; >> + >> + usb3_hs_ep: endpoint { > > Please define these ports in the SoC DTSI and plumb them through &labels > in this one > ACK. Will update in v4. Regards, Krishna,