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AJvYcCWM7lD1rV8kwzh064YgcVve7jFUaqfN8Dbcz3/8wLbMG6s6HBO+Jr7FXn9osJOypzHKG2kIggglOdOHM6k=@vger.kernel.org X-Gm-Message-State: AOJu0YxaJyWjjmS3UEfGZOMLoxnEN/5lLRqoprJ4iQd1+H/hGnsVZHjS TKTCMswhd4CKbeOvv6qHYw2JqBQwIDD7x50YxOeeSx8O3NfjxgW3HaEe9229zM4= X-Google-Smtp-Source: AGHT+IGbHkUNqAug0TtbZHZxpqz58AzfONDihCHxG0wzsQG0OM473lIfRYWud/gLeqmeP9GloZ6rAg== X-Received: by 2002:a05:600c:1c83:b0:426:59fe:ac27 with SMTP id 5b1f17b1804b1-42bb01edc2amr81614945e9.26.1725118433566; Sat, 31 Aug 2024 08:33:53 -0700 (PDT) Received: from [192.168.50.4] ([82.78.167.144]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42bb6df7c5bsm79364085e9.23.2024.08.31.08.33.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 31 Aug 2024 08:33:53 -0700 (PDT) Message-ID: Date: Sat, 31 Aug 2024 18:33:50 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 07/12] nvmem: microchip-otpc: Add missing register definitions Content-Language: en-US To: Christian Melki , Srinivas Kandagatla , "moderated list:MICROCHIP OTPC DRIVER" , open list , Nicolas Ferre References: <20240821105943.230281-1-ada@thorsis.com> <20240821105943.230281-8-ada@thorsis.com> <5228af83-b423-4f51-820a-edfc40017ca8@tuxon.dev> <20240828-making-gangrene-786ec368b106@thorsis.com> From: claudiu beznea In-Reply-To: <20240828-making-gangrene-786ec368b106@thorsis.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 28.08.2024 11:14, Alexander Dahl wrote: > Hello Claudiu, > > Am Sat, Aug 24, 2024 at 06:54:02PM +0300 schrieb claudiu beznea: >> >> >> On 21.08.2024 13:59, Alexander Dahl wrote: >>> According to datasheets DS60001765B for SAMA7G5 and DS60001579G for >>> SAM9X60. >>> >>> Signed-off-by: Alexander Dahl >>> --- >>> drivers/nvmem/microchip-otpc.c | 15 +++++++++++++++ >>> 1 file changed, 15 insertions(+) >>> >>> diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c >>> index b8ed7412dbca..4630e96243ac 100644 >>> --- a/drivers/nvmem/microchip-otpc.c >>> +++ b/drivers/nvmem/microchip-otpc.c >>> @@ -21,9 +21,24 @@ >>> #define MCHP_OTPC_AR (0x8) >>> #define MCHP_OTPC_SR (0xc) >>> #define MCHP_OTPC_SR_READ BIT(6) >>> +#define MCHP_OTPC_IER (0x10) >>> +#define MCHP_OTPC_IDR (0x14) >>> +#define MCHP_OTPC_IMR (0x18) >>> +#define MCHP_OTPC_ISR (0x1C) >>> +#define MCHP_OTPC_ISR_COERR BIT(13) >>> #define MCHP_OTPC_HR (0x20) >>> #define MCHP_OTPC_HR_SIZE GENMASK(15, 8) >>> #define MCHP_OTPC_DR (0x24) >>> +#define MCHP_OTPC_BAR (0x30) >>> +#define MCHP_OTPC_CAR (0x34) >>> +#define MCHP_OTPC_UHC0R (0x50) >>> +#define MCHP_OTPC_UHC1R (0x54) >>> +#define MCHP_OTPC_UID0R (0x60) >>> +#define MCHP_OTPC_UID1R (0x64) >>> +#define MCHP_OTPC_UID2R (0x68) >>> +#define MCHP_OTPC_UID3R (0x6C) >>> +#define MCHP_OTPC_WPMR (0xE4) >>> +#define MCHP_OTPC_WPSR (0xE8) >> >> Are all these used in driver? > > Not all, but some. What are you implying? Only add register > definitions actually used in the driver? Yes! > Why? Less code to maintain. If it's not used there is no meaning to have it. > > Those register offsets won't change, but helped us when debugging. > Debug code (e.g. register dump) is not part of the patch series. > > Greets > Alex > >> >>> >>> #define MCHP_OTPC_NAME "mchp-otpc" >>> #define MCHP_OTPC_SIZE (11 * 1024)