From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from canpmsgout12.his.huawei.com (canpmsgout12.his.huawei.com [113.46.200.227]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 265D23EC830 for ; Thu, 8 Oct 2026 08:12:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.227 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791447159; cv=none; b=aulChHVzp7RE5w2gXHUDk7CWw5Eqpw/2U9ypA983ZLHRJw3lUUFNKRWCdKzdt+8W0c0VxxaQZw0QTSmET4q9B0AIQyYOHTvW5X2QF38uW2iOulyR0cTbnSq9HxkOspTn8sDgY+4QgDNfiy+5zb4dsc6wLdwRh+Z44tkj7u8LioM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791447159; c=relaxed/simple; bh=niQ+/qy75dHnLZd2nYzhxgjuKUUIs7nhkwQtX9TGYBo=; h=Message-ID:Date:MIME-Version:Subject:To:CC:References:From: In-Reply-To:Content-Type; b=K4kMNuaOyNtyVkJnYfeG9svDLQ2F6jiME4UJKgg+dg0QCIy2q/hlHHm8zJ1aMNiZZ4Zp6zpYEACxVPUr3of1XceLu2Sz2PzeK9sDUlzG/rmV6fQo8cnKuaPOT55OfTn1LXAzSHEneUkPmZCw7hbnSptghAvxOADEMXJIeQJjzOc= ARC-Authentication-Results:i=1; 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Thu, 8 Oct 2026 16:00:35 +0800 (CST) Received: from kwepemk200008.china.huawei.com (unknown [7.202.194.74]) by mail.maildlp.com (Postfix) with ESMTPS id D3D3F40578; Thu, 8 Oct 2026 16:12:30 +0800 (CST) Received: from [10.67.110.68] (10.67.110.68) by kwepemk200008.china.huawei.com (7.202.194.74) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.45; Thu, 8 Oct 2026 16:12:30 +0800 Message-ID: Date: Thu, 8 Oct 2026 16:12:28 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 10/21] arm64: percpu: Specialise set_my_cpu_offset() for the primary CPU To: Will Deacon , CC: , Arnd Bergmann , Ard Biesheuvel , Ada Couprie Diaz , David Hildenbrand , Catalin Marinas , Vladimir Murzin , Mark Rutland , Mostafa Saleh , Lorenzo Stoakes , Oliver Upton , Linus Walleij , Marc Zyngier References: <20260918161407.2300-1-will@kernel.org> <20260918161407.2300-11-will@kernel.org> From: Jinjie Ruan In-Reply-To: <20260918161407.2300-11-will@kernel.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-ClientProxiedBy: kwepems200001.china.huawei.com (7.221.188.67) To kwepemk200008.china.huawei.com (7.202.194.74) 在 2026/9/19 0:13, Will Deacon 写道: > set_my_cpu_offset() is only called from smp_prepare_boot_cpu() which > runs once on the primary CPU and before alternatives have been applied. > > Rework the function so that it operates only on the boot CPU offset, > drop the unused alternative code sequence and internalise it into smp.c > alongside its only caller. > > Signed-off-by: Will Deacon > --- > arch/arm64/include/asm/percpu.h | 8 -------- > arch/arm64/kernel/smp.c | 8 +++++++- > 2 files changed, 7 insertions(+), 9 deletions(-) > > diff --git a/arch/arm64/include/asm/percpu.h b/arch/arm64/include/asm/percpu.h > index b57b2bb00967..3dc7291b16e9 100644 > --- a/arch/arm64/include/asm/percpu.h > +++ b/arch/arm64/include/asm/percpu.h > @@ -12,14 +12,6 @@ > #include > #include > > -static inline void set_my_cpu_offset(unsigned long off) > -{ > - asm volatile(ALTERNATIVE("msr tpidr_el1, %0", > - "msr tpidr_el2, %0", > - ARM64_HAS_VIRT_HOST_EXTN) > - :: "r" (off) : "memory"); > -} > - > static inline unsigned long __hyp_my_cpu_offset(void) > { > /* > diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c > index a61dc3016a11..702dee8d0db5 100644 > --- a/arch/arm64/kernel/smp.c > +++ b/arch/arm64/kernel/smp.c > @@ -446,6 +446,12 @@ void __init smp_cpus_done(unsigned int max_cpus) > mark_linear_text_alias_ro(); > } > > +static void __init set_boot_cpu_offset(void) > +{ > + asm volatile("msr tpidr_el1, %0" > + :: "r" (per_cpu_offset(0)) : "memory"); > +} Reviewed-by: Jinjie Ruan > + > void __init smp_prepare_boot_cpu(void) > { > /* > @@ -453,7 +459,7 @@ void __init smp_prepare_boot_cpu(void) > * setup_per_cpu_areas(), and CPU0's boot time per-cpu area will be > * freed shortly, so we must move over to the runtime per-cpu area. > */ > - set_my_cpu_offset(per_cpu_offset(smp_processor_id())); > + set_boot_cpu_offset(); > > cpuinfo_store_boot_cpu(); > setup_boot_cpu_features(); -- Best regards, Jinjie