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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2e53dcb487bsm27489855eec.31.2026.04.23.04.25.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Apr 2026 04:25:18 -0700 (PDT) Date: Thu, 23 Apr 2026 04:25:16 -0700 From: Ananthu C V To: Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: Re: [PATCH v4 2/2] arch: arm64: boot: dts: qcom: add IMEM and PIL regions for glymur Message-ID: References: <20260327-glymur-imem-v4-0-8fe0f20ad9fd@oss.qualcomm.com> <20260327-glymur-imem-v4-2-8fe0f20ad9fd@oss.qualcomm.com> <77111d7c-4f18-4c6b-a3fd-b5e2981939dd@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <77111d7c-4f18-4c6b-a3fd-b5e2981939dd@oss.qualcomm.com> X-Proofpoint-ORIG-GUID: zXY7QfA0E6Cu76IjErigZAO2csmM-TMr X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDIzMDExMyBTYWx0ZWRfXx6QXoacUxg3X X2lm/L7snZOY+pwxeTt6jJffHrHdBUOYCvsSiW6Eia1uT+JuM7Crx2cAEp0Oigtz4Y1eykGX/yd mKTSLaIIkpMGeScR1hndsK2mGNtkt8vXVxtX+GB5XzZ4c4CTXLZ9TpLuwG6wQDaQYr67AkEO8VN IdDcvvSu16MrnLrB6bEIN3Spv/3P76OfbNnu0O/7SrU7pHiN0QaKECtFEWjKKxfZZd2xKOd/MuG Bi6ITt8swrD4ss93h+WsSG9SQxKpECDHh55/P9uyCNjY9+sKN785Fz1w4UvseBIlfNsYybwGsxR CBy8WN16a0ucpUqqfcSoxDXrMuSJSqcGhdhYoq8KOarg+lWsfJMAMEr64jbNFecqJgiy8hZRYko 5r/hnr4Ujt8Eic4C81EvjXbhKBvaSpaCL3/w9k40jD7GK6m9IsuXdUjmZjP2Zw9gc1EKn9ZdJ5t 1qe7IZnTOSHVOwm+fHg== X-Authority-Analysis: v=2.4 cv=UqNT8ewB c=1 sm=1 tr=0 ts=69ea01a0 cx=c_pps a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=kj9zAlcOel0A:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=UrVpMDgfXf5DSJTZeJIA:9 a=CjuIK1q_8ugA:10 a=bBxd6f-gb0O0v-kibOvt:22 X-Proofpoint-GUID: zXY7QfA0E6Cu76IjErigZAO2csmM-TMr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-23_03,2026-04-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 adultscore=0 malwarescore=0 spamscore=0 suspectscore=0 priorityscore=1501 impostorscore=0 bulkscore=0 lowpriorityscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604230113 On Wed, Apr 22, 2026 at 01:07:46PM +0200, Konrad Dybcio wrote: > On 4/21/26 11:47 AM, Ananthu C V wrote: > > Hi Konrad, > > > > On Wed, Apr 08, 2026 at 11:42:14AM +0200, Konrad Dybcio wrote: > >> On 3/27/26 11:24 AM, Ananthu C V wrote: > >>> Add an IMEM on glymur which falls back to mmio-sram and define the > >>> PIL relocation info region as its child, for post mortem tools to > >>> locate the loaded remoteprocs. > >>> > >>> Signed-off-by: Ananthu C V > >>> --- > >>> arch/arm64/boot/dts/qcom/glymur.dtsi | 16 ++++++++++++++++ > >>> 1 file changed, 16 insertions(+) > >>> > >>> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi > >>> index 4886e87ebd49..21ae05f0ee17 100644 > >>> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi > >>> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi > >>> @@ -6457,6 +6457,22 @@ rx-pins { > >>> }; > >>> }; > >>> > >>> + sram@14680000 { > >>> + compatible = "qcom,glymur-imem", "mmio-sram"; > >>> + reg = <0x0 0x14680000 0x0 0x1000>; > >>> + ranges = <0 0 0x14680000 0x1000>; > >> > >> size=0x2c_000 > > > > on glymur the imem region is a 4kb region of size 0x1000. > > No.. that's the "shared" slice of it Indeed, I missed out on mentioning the "shared" word. The size of the whole imem region is indeed 0x2c_000. I used kaanapali, which only mentions the shared imem region, as a reference before. I'll make a revision to reflect the whole imem region size. Thanks for the review. Best, Ananthu