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[83.9.1.37]) by smtp.gmail.com with ESMTPSA id z1-20020a2e8e81000000b00295a8c68585sm299658ljk.56.2023.04.06.06.59.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 06 Apr 2023 06:59:45 -0700 (PDT) Message-ID: Date: Thu, 6 Apr 2023 15:59:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 Subject: Re: [PATCH v6 09/11] arm64: dts: qcom: sm8250: Add Crypto Engine support Content-Language: en-US To: Bhupesh Sharma , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Cc: agross@kernel.org, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, andersson@kernel.org, bhupesh.linux@gmail.com, krzysztof.kozlowski@linaro.org, robh+dt@kernel.org, vladimir.zapolskiy@linaro.org, rfoss@kernel.org, neil.armstrong@linaro.org, djakov@kernel.org References: <20230405072836.1690248-1-bhupesh.sharma@linaro.org> <20230405072836.1690248-10-bhupesh.sharma@linaro.org> From: Konrad Dybcio In-Reply-To: <20230405072836.1690248-10-bhupesh.sharma@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5.04.2023 09:28, Bhupesh Sharma wrote: > Add crypto engine (CE) and CE BAM related nodes and definitions to > 'sm8250.dtsi'. > > Co-developed-by and Signed-off-by: Vladimir Zapolskiy > Signed-off-by: Bhupesh Sharma > --- > arch/arm64/boot/dts/qcom/sm8250.dtsi | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi > index 7b78761f2041..2f6b8d4a2d41 100644 > --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi > @@ -2222,6 +2222,28 @@ ufs_mem_phy_lanes: phy@1d87400 { > }; > }; > > + cryptobam: dma-controller@1dc4000 { > + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; > + reg = <0 0x01dc4000 0 0x24000>; > + interrupts = ; > + #dma-cells = <1>; > + qcom,ee = <0>; > + qcom,controlled-remotely; > + iommus = <&apps_smmu 0x594 0x0011>, > + <&apps_smmu 0x596 0x0011>; > + }; > + > + crypto: crypto@1dfa000 { > + compatible = "qcom,sm8250-qce", "qcom,sm8150-qce", "qcom,qce"; > + reg = <0 0x01dfa000 0 0x6000>; > + dmas = <&cryptobam 4>, <&cryptobam 5>; > + dma-names = "rx", "tx"; > + iommus = <&apps_smmu 0x594 0x0011>, > + <&apps_smmu 0x596 0x0011>; > + interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>; > + interconnect-names = "memory"; Shouldn't we also attach the contexts from qcom_cedev_ns_cb{}? Konrad > + }; > + > tcsr_mutex: hwlock@1f40000 { > compatible = "qcom,tcsr-mutex"; > reg = <0x0 0x01f40000 0x0 0x40000>;