Re: [PATCH v2 1/7] EDAC/amd64: Support more than two controllers for chip selects handling

["Phillips, Kim" <kim.phillips@amd.com>]

On 7/9/19 4:56 PM, Ghannam, Yazen wrote:
> From: Yazen Ghannam <yazen.ghannam@amd.com>
> 
> The struct chip_select array that's used for saving chip select bases
> and masks is fixed at length of two. There should be one struct
> chip_select for each controller, so this array should be increased to
> support systems that may have more than two controllers.
> 
> Increase the size of the struct chip_select array to eight, which is the
> largest number of controllers per die currently supported on AMD
> systems.
> 
> Fix number of DIMMs and Chip Select bases/masks on Family17h, because AMD
> Family 17h systems support 2 DIMMs, 4 CS bases, and 2 CS masks per
> channel.
> 
> Also, carve out the Family 17h+ reading of the bases/masks into a
> separate function. This effectively reverts the original bases/masks
> reading code to before Family 17h support was added.
> 
> This is a second version of a commit that was reverted.
> 
> Fixes: 07ed82ef93d6 ("EDAC, amd64: Add Fam17h debug output")
> Fixes: 8de9930a4618 ("Revert "EDAC/amd64: Support more than two controllers for chip select handling"")
> Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
> ---

For this and the rest of the series:

Tested-by: Kim Phillips <kim.phillips@amd.com>

Thanks,

Kim