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Tue, 22 Oct 2024 04:38:34 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 49M4cXGU006789 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 22 Oct 2024 04:38:33 GMT Received: from [10.216.44.181] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 21 Oct 2024 21:38:28 -0700 Message-ID: Date: Tue, 22 Oct 2024 10:08:25 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 6/6] clk: qcom: Add support for Video Clock Controller on QCS8300 To: Dmitry Baryshkov CC: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ajit Pandey , Taniya Das , Jagadeesh Kona , "Satya Priya Kakitapalli" , , , , References: <20241018-qcs8300-mm-patches-v1-0-859095e0776c@quicinc.com> <20241018-qcs8300-mm-patches-v1-6-859095e0776c@quicinc.com> <2wahtcgpz7juse325f6vp5od75pwrwyl5v3c2ln2xa64qzpvid@f43c7uxx34r6> Content-Language: en-US From: Imran Shaik In-Reply-To: <2wahtcgpz7juse325f6vp5od75pwrwyl5v3c2ln2xa64qzpvid@f43c7uxx34r6> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 3XZIkn0qZ_bQoKo9gjg8bDBOoNXgyRuk X-Proofpoint-ORIG-GUID: 3XZIkn0qZ_bQoKo9gjg8bDBOoNXgyRuk X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 malwarescore=0 priorityscore=1501 clxscore=1011 mlxlogscore=999 phishscore=0 bulkscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410220029 On 10/18/2024 5:38 PM, Dmitry Baryshkov wrote: > On Fri, Oct 18, 2024 at 04:42:34PM +0530, Imran Shaik wrote: >> Add support to the QCS8300 Video clock controller by extending >> the SA8775P Video clock controller, which is mostly identical >> but QCS8300 has minor difference. >> >> Signed-off-by: Imran Shaik >> --- >> drivers/clk/qcom/videocc-sa8775p.c | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/drivers/clk/qcom/videocc-sa8775p.c b/drivers/clk/qcom/videocc-sa8775p.c >> index bf5de411fd5d..d0494ba81f5f 100644 >> --- a/drivers/clk/qcom/videocc-sa8775p.c >> +++ b/drivers/clk/qcom/videocc-sa8775p.c >> @@ -524,6 +524,7 @@ static struct qcom_cc_desc video_cc_sa8775p_desc = { >> >> static const struct of_device_id video_cc_sa8775p_match_table[] = { >> { .compatible = "qcom,sa8775p-videocc" }, >> + { .compatible = "qcom,qcs8300-videocc" }, > > Sorted, please. > Sure, I will fix this in next patch series. >> { } >> }; >> MODULE_DEVICE_TABLE(of, video_cc_sa8775p_match_table); >> @@ -550,6 +551,9 @@ static int video_cc_sa8775p_probe(struct platform_device *pdev) >> clk_lucid_evo_pll_configure(&video_pll0, regmap, &video_pll0_config); >> clk_lucid_evo_pll_configure(&video_pll1, regmap, &video_pll1_config); >> > > Comment? > Sure, I will update the comment details for qcs8300-videocc in next patch series. Thanks, Imran >> + if (of_device_is_compatible(pdev->dev.of_node, "qcom,qcs8300-videocc")) >> + regmap_write(regmap, video_cc_mvs0c_div2_div_clk_src.reg, 2); >> + >> /* Keep some clocks always enabled */ >> qcom_branch_set_clk_en(regmap, 0x80ec); /* VIDEO_CC_AHB_CLK */ >> qcom_branch_set_clk_en(regmap, 0x8144); /* VIDEO_CC_SLEEP_CLK */ >> >> -- >> 2.25.1 >> >