From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BB457C433ED for ; Fri, 14 May 2021 22:53:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8E8E96143F for ; Fri, 14 May 2021 22:53:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234141AbhENWyO (ORCPT ); Fri, 14 May 2021 18:54:14 -0400 Received: from mail.kernel.org ([198.145.29.99]:33456 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230371AbhENWyN (ORCPT ); Fri, 14 May 2021 18:54:13 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 2D9C86140A; Fri, 14 May 2021 22:53:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1621032781; bh=YrRUzwUUrm9b+bJX+DwHQoDonOGLf0mKSa8j8FGg7hc=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=WuDBXv9qQA7ik47vsUWDo6OVFk52ZEbzTnCsKT7RgbhwlzjHMzSCAH4k46r0wu4RQ kaTtf8GAdkETlwZvE867WlH/3Xr9xMYefyqy0aURQe9Y39gTKG3tWPNJxfsge5Phw4 l3fiTIYjgJAUDb0JE8kB7b4/y/yzRy+x5jqIemItjuAlsnDF+fw2xvcr3CiDzZ9z3l CgIyU4fD+8Q2zJmelOy4ba2vygF5TyepWsGEqGw0vDeFASFLtYm+G+NOu7wPutixCt i9I6BoKSBkIsX0WLftFozcjLNyMb68bu1TYrPgVIbTUJdbhkzqUhUsvKiIIroZRzUo m67o0GEHV6YqQ== Subject: Re: [PATCH 1/6] x86/traps: add X86_NR_HW_TRAPS to To: "H. Peter Anvin" , Ingo Molnar , Thomas Gleixner , Borislav Petkov Cc: Steve Wahl , Mike Travis , Dimitri Sivanich , Russ Anderson , Linux Kernel Mailing List References: <20210511005531.1065536-1-hpa@zytor.com> <20210511005531.1065536-2-hpa@zytor.com> From: Andy Lutomirski Message-ID: Date: Fri, 14 May 2021 15:53:00 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.1 MIME-Version: 1.0 In-Reply-To: <20210511005531.1065536-2-hpa@zytor.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/10/21 5:55 PM, H. Peter Anvin wrote: > From: "H. Peter Anvin (Intel)" > > The x86 architecture supports up to 32 trap vectors. Add that constant > to . > > Signed-off-by: H. Peter Anvin (Intel) > --- > arch/x86/include/asm/trapnr.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/x86/include/asm/trapnr.h b/arch/x86/include/asm/trapnr.h > index f5d2325aa0b7..f0baf92da20b 100644 > --- a/arch/x86/include/asm/trapnr.h > +++ b/arch/x86/include/asm/trapnr.h > @@ -27,6 +27,7 @@ > #define X86_TRAP_VE 20 /* Virtualization Exception */ > #define X86_TRAP_CP 21 /* Control Protection Exception */ > #define X86_TRAP_VC 29 /* VMM Communication Exception */ > +#define X86_NR_HW_TRAPS 32 /* Max hardware trap number */ > #define X86_TRAP_IRET 32 /* IRET Exception */ > > #endif > Acked-by: Andy Lutomirski