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[83.9.1.44]) by smtp.gmail.com with ESMTPSA id g12-20020ac24d8c000000b004b0b2212315sm1154062lfe.121.2022.12.15.04.49.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 15 Dec 2022 04:49:02 -0800 (PST) Message-ID: Date: Thu, 15 Dec 2022 13:49:00 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 Subject: Re: [PATCH v2 1/7] arm64: dts: qcom: sc8280xp: rename qup2_uart17 to uart17 To: Brian Masney , andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: quic_shazhuss@quicinc.com, robh+dt@kernel.org, johan+linaro@kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, ahalaney@redhat.com, echanude@redhat.com References: <20221214171145.2913557-1-bmasney@redhat.com> <20221214171145.2913557-2-bmasney@redhat.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20221214171145.2913557-2-bmasney@redhat.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 14.12.2022 18:11, Brian Masney wrote: > In preparation for adding the missing SPI and I2C nodes to > sc8280xp.dtsi, it was decided to rename all of the existing qupX_ > uart, spi, and i2c nodes to drop the qupX_ prefix. Let's go ahead > and rename qup2_uart17 to uart17. Note that some nodes are moved in the > file by this patch to preserve the expected sort order in the file. > > Signed-off-by: Brian Masney > Link: https://lore.kernel.org/lkml/20221212182314.1902632-1-bmasney@redhat.com/ > --- Reviewed-by: Konrad Dybcio Konrad > This is a new patch that's introduced in v2. > > arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 12 ++++++------ > arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 12 ++++++------ > arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 14 +++++++------- > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +- > 4 files changed, 20 insertions(+), 20 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts > index 84cb6f3eeb56..61f2e44e70c1 100644 > --- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts > +++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts > @@ -17,7 +17,7 @@ / { > compatible = "qcom,sa8295p-adp", "qcom,sa8540p"; > > aliases { > - serial0 = &qup2_uart17; > + serial0 = &uart17; > }; > > chosen { > @@ -240,11 +240,6 @@ &qup2 { > status = "okay"; > }; > > -&qup2_uart17 { > - compatible = "qcom,geni-debug-uart"; > - status = "okay"; > -}; > - > &remoteproc_adsp { > firmware-name = "qcom/sa8540p/adsp.mbn"; > status = "okay"; > @@ -338,6 +333,11 @@ pm8450g_gpios: gpio@c000 { > }; > }; > > +&uart17 { > + compatible = "qcom,geni-debug-uart"; > + status = "okay"; > +}; > + > &ufs_mem_hc { > reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>; > > diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts > index 21f3ff024910..b6e0db5508c7 100644 > --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts > +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts > @@ -17,7 +17,7 @@ / { > compatible = "qcom,sa8540p-ride", "qcom,sa8540p"; > > aliases { > - serial0 = &qup2_uart17; > + serial0 = &uart17; > }; > > chosen { > @@ -192,11 +192,6 @@ &qup2 { > status = "okay"; > }; > > -&qup2_uart17 { > - compatible = "qcom,geni-debug-uart"; > - status = "okay"; > -}; > - > &remoteproc_nsp0 { > firmware-name = "qcom/sa8540p/cdsp.mbn"; > status = "okay"; > @@ -207,6 +202,11 @@ &remoteproc_nsp1 { > status = "okay"; > }; > > +&uart17 { > + compatible = "qcom,geni-debug-uart"; > + status = "okay"; > +}; > + > &ufs_mem_hc { > reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>; > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts > index 551768f97729..db273face248 100644 > --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts > +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts > @@ -17,7 +17,7 @@ / { > compatible = "qcom,sc8280xp-crd", "qcom,sc8280xp"; > > aliases { > - serial0 = &qup2_uart17; > + serial0 = &uart17; > }; > > backlight { > @@ -363,12 +363,6 @@ keyboard@68 { > }; > }; > > -&qup2_uart17 { > - compatible = "qcom,geni-debug-uart"; > - > - status = "okay"; > -}; > - > &remoteproc_adsp { > firmware-name = "qcom/sc8280xp/qcadsp8280.mbn"; > > @@ -381,6 +375,12 @@ &remoteproc_nsp0 { > status = "okay"; > }; > > +&uart17 { > + compatible = "qcom,geni-debug-uart"; > + > + status = "okay"; > +}; > + > &ufs_mem_hc { > reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>; > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > index 109c9d2b684d..951cb1b6fcc4 100644 > --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > @@ -813,7 +813,7 @@ qup2: geniqup@8c0000 { > > status = "disabled"; > > - qup2_uart17: serial@884000 { > + uart17: serial@884000 { > compatible = "qcom,geni-uart"; > reg = <0 0x00884000 0 0x4000>; > clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>;