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AFNElJ/4E+fIieBgTRTiNlb6fD6FuG45fJ7zaRICkKamfVqE9aAmqmKDNiJg8foNUfeqy9dp3b+ADEcV88TGeZk=@vger.kernel.org X-Gm-Message-State: AOJu0YwJfKMr7lHMsAwXDXiYwy4mxsTYjH19G7+ZCFFWrRbEWDb1aIvo 0eUdFVEEo/Tdjb5FFiXcwT/ezSUEBIZD08UTAkNqCnwWtHkhgU67D5947EC5tSQi7m+r/jIcDDf bWiv51g== X-Received: from pfnj5.prod.google.com ([2002:aa7:83c5:0:b0:82f:8a3b:87f0]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:3003:b0:82f:24e:6a48 with SMTP id d2e1a72fcca58-83921ef6e0fmr3897849b3a.5.1778002882564; Tue, 05 May 2026 10:41:22 -0700 (PDT) Date: Tue, 5 May 2026 10:41:21 -0700 In-Reply-To: <655fd173-5dab-40c2-8f77-8b3e891a1c40@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250315030928.2373250-1-seanjc@google.com> <655fd173-5dab-40c2-8f77-8b3e891a1c40@amd.com> Message-ID: Subject: Re: [PATCH] iommu/amd: Explicitly bail from enable_iommus_vapic() when in legacy mode From: Sean Christopherson To: Vasant Hegde Cc: Joerg Roedel , iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Suravee Suthikulpanit Content-Type: text/plain; charset="us-ascii" On Tue, May 05, 2026, Vasant Hegde wrote: > Sean, > > On 3/15/2025 8:39 AM, Sean Christopherson wrote: > > Bail early from enable_iommus_vapic() if IOMMUs are configured for either > > of the legacy modes, as it's absurdly difficult to see that > > iommu_ga_log_enable() is guaranteed to fail because iommu_init_ga_log() > > skips allocating the ga_log. > > > > Opportunistically have iommu_ga_log_enable() WARN if it's called without > > IOMMUs being configured to support AVIC/vAPIC. > > > > > > Cc: Suravee Suthikulpanit > > Signed-off-by: Sean Christopherson > > --- > > drivers/iommu/amd/init.c | 10 ++++++---- > > 1 file changed, 6 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c > > index cb536d372b12..05c568da589a 100644 > > --- a/drivers/iommu/amd/init.c > > +++ b/drivers/iommu/amd/init.c > > @@ -931,8 +931,8 @@ static int iommu_ga_log_enable(struct amd_iommu *iommu) > > > > static int iommu_init_ga_log(struct amd_iommu *iommu) > > { > > - if (!AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir)) > > - return 0; > > + if (WARN_ON_ONCE(!AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir))) > + return -EINVAL; > > > > iommu->ga_log = iommu_alloc_pages(GFP_KERNEL, get_order(GA_LOG_SIZE)); > > if (!iommu->ga_log) > > @@ -2863,8 +2863,10 @@ static void enable_iommus_vapic(void) > > return; > > } > > > > - if (AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir) && > > - !check_feature(FEATURE_GAM_VAPIC)) { > > + if (!AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir)) > > + return; > > + > > We should move this down after SNP check. Otherwise we may hit WARN_ON_ONCE in > iommu_init_ga_log(). No? enable_iommus_vapic() ends up with: 1. if (!AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir)) return; 2. if (!check_feature(FEATURE_GAM_VAPIC)) { amd_iommu_guest_ir = AMD_IOMMU_GUEST_IR_LEGACY_GA; return; } 3. if (amd_iommu_snp_en && !FEATURE_SNPAVICSUP_GAM(amd_iommu_efr2)) { pr_warn("Force to disable Virtual APIC due to SNP\n"); amd_iommu_guest_ir = AMD_IOMMU_GUEST_IR_LEGACY_GA; return; } /* Enabling GAM and SNPAVIC support */ for_each_iommu(iommu) { if (iommu_init_ga_log(iommu) || iommu_ga_log_enable(iommu)) return; iommu_feature_enable(iommu, CONTROL_GAM_EN); if (amd_iommu_snp_en) iommu_feature_enable(iommu, CONTROL_SNPAVIC_EN); } And that's the only call site for iommu_init_ga_log(). Getting past #1 guarantees "amd_iommu_guest_ir == AMD_IOMMU_GUEST_IR_VAPIC", and if #2 and #3 return early if they modify amd_iommu_guest_ir, so it should be impossible for iommu_init_ga_log() to be called with amd_iommu_guest_ir anything other than AMD_IOMMU_GUEST_IR_VAPIC. Shifting the initial check down isn't functionally correct, as it wouldn't do the right thing if amd_iommu_guest_ir==AMD_IOMMU_GUEST_IR_LEGACY. AFAICT, nothing prevents calling into enable_iommus_vapic() in that case.