From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CC0A03644C3 for ; Sun, 17 May 2026 16:54:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779036888; cv=none; b=QsBGrBn/yM8PxPz7E8dS+I68+Vris0TodDpYFdar4xHSrWZhCUYd2YG/GOS3wdnrjiWqMYrMcq9o/ZsLGmzNyZIdbWdeGTRNw6ZTeKeci0TwP6EziwAu6+lBDTKEw3SOC8OZ8imIvAjgMrRnzOWB59pvg6vXVxQaL7wYXbtvTBw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779036888; c=relaxed/simple; bh=rl8/+H7UrkvD6Wm6GXhI3VO843IjVdH5GorUML886+s=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=e4tabhXgvawVqTKrwd6QR1b96fky7dGgJHzxT9vRmihpLWEGKmK7Vsxdm1BniNXTZM49WbwsD2wOZegjWC/7xUGYDJ4xlZIOUduKh9p92opIZx/u40kcHSYxW/eB+5d6XGR9lTPtnduaMKQ992VK+T9o9SR7ezlH0qnImj7P9Po= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=JsbuppPf; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="JsbuppPf" Received: by smtp.kernel.org (Postfix) with ESMTPSA id EEE6BC2BCB0; Sun, 17 May 2026 16:54:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1779036888; bh=rl8/+H7UrkvD6Wm6GXhI3VO843IjVdH5GorUML886+s=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=JsbuppPfeqHH826a2rLBZNT3CPj7ruSwlDcOIGBAMfxGU0LFwgx2/s+KvhkULmoY0 hyccBDN6SGggxgqY8GCkNqjMwJZ9va5Q1N3NBASYSJpnBtrjcSDOVo0RLgW9g78nIj BJzZSnp4D1aNaNNENmFUit0Fd5u2FagM0CS2EtbQMWMD4wHj5d5byfx1QD7vP81eg4 EqNlosfLq58w3zL8FXfGeDAI5fM5ke012FrHi6w0loU111sRbhVyedtdPTt7wsNQiE /ZXLzavaTaJsqsl+B48Wh43rpbgslHByU9QG5hF+V7LD5pixVnEOUwqpyyAZnylaw2 /OhcjcWFm6lhw== Date: Sun, 17 May 2026 22:24:44 +0530 From: Vinod Koul To: Jonas Karlman Cc: Neil Armstrong , Heiko Stuebner , linux-phy@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 1/2] phy: rockchip: inno-hdmi: Add configure() and validate() ops Message-ID: References: <20260515195512.1757363-1-jonas@kwiboo.se> <20260515195512.1757363-2-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On 15-05-26, 23:04, Jonas Karlman wrote: > Hi, > > On 5/15/2026 9:55 PM, Jonas Karlman wrote: > > The commit 10ed34d6eaaf ("phy: Add HDMI configuration options") > > introduced a way for HDMI PHYs to be configured through the generic > > phy_configure() function. > > > > This driver derives the TMDS character rate from the pixel clock and the > > PHY bus width setting. However, no in-tree consumer of this PHY has ever > > called phy_set_bus_width() to change the TMDS character rate as only > > 8-bit RGB output is supported by the HDMI display driver. > > > > Add configure() and validate() ops to allow consumers to configure the > > TMDS character rate using phy_configure(). Fallback to the deprecated > > way of using the PHY bus width to configure the TMDS character rate. > > > > A typical call chain during DRM modeset on a RK3328 device: > > > > dw_hdmi_rockchip_encoder_atomic_check(): > > - inno_hdmi_phy_validate(): pixclock 148500000 tmdsclock 594000000 > > > > dw_hdmi_rockchip_encoder_atomic_mode_set(): > > - inno_hdmi_phy_configure(): pixclock 148500000 > > - inno_hdmi_phy_validate(): pixclock 148500000 tmdsclock 594000000 > > > > vop_crtc_atomic_enable(): > > - inno_hdmi_phy_rk3328_clk_set_rate(): rate 594000000 tmdsclk 594000000 > > - inno_hdmi_phy_rk3328_clk_set_rate(): pixclock 594000000 tmdsclock 594000000 > > - inno_hdmi_phy_rk3328_clk_recalc_rate(): pixclock 594000000 vco 594000000 > > > > dw_hdmi_rockchip_encoder_enable(): > > - inno_hdmi_phy_power_on(): Inno HDMI PHY Power On > > - inno_hdmi_phy_rk3328_clk_set_rate(): rate 594000000 tmdsclk 594000000 > > > > Signed-off-by: Jonas Karlman > > --- > > Changes in v3: > > - Change validate() ops to only validate tmdsclock > > - Add comments about expected consumer usage > > - Update commit message with a typical call chain > > Changes in v2: > > - Add validate() ops to validate that the TMDS rate is supported > > - Split out parts that remove the old workaround into a separate patch > > > > Patch "drm/rockchip: dw_hdmi: Configure HDMI PHY in atomic_mode_set()" > > at [1] adds phy_validate() and phy_configure() calls for this HDMI PHY. > > > > [1] https://lore.kernel.org/dri-devel/20260510183114.1248840-10-jonas@kwiboo.se/ > > --- > > drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 60 ++++++++++++++++++- > > 1 file changed, 59 insertions(+), 1 deletion(-) > > [snip] > > > +static int inno_hdmi_phy_validate(struct phy *phy, enum phy_mode mode, > > + int submode, union phy_configure_opts *opts) > > +{ > > + const struct pre_pll_config *cfg = pre_pll_cfg_table; > > + unsigned long tmdsclock; > > + > > + if (!(mode == PHY_MODE_HDMI && submode == PHY_HDMI_MODE_TMDS)) > > + return -EINVAL; > > + > > + if (!opts->hdmi.tmds_char_rate || opts->hdmi.tmds_char_rate > 594000000) > > + return -EINVAL; > > Sashiko reasoning log pointed out that a consumer of phy_validate() or > phy_configure() can make a call with opts=NULL, so I may likely send a > v4 of this series to fix such possible NULL pointer dereference here. Yes please > > Or is that something that possible should be checked before phy core > calls the .validate()/.configure() ops? The opts is an optional argument depending upon the mode to be valid. So we cant do that in the core... > > Multiple other phy .configure() ops seem to dereference opts members > without any type of opts NULL check. (next-20260508) We should fix these PS: Any reason why you are sending encypted emails? -- ~Vinod