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Mon, 01 Jun 2026 05:36:32 -0700 (PDT) X-Received: by 2002:a05:600c:190e:b0:490:a9d6:8f2f with SMTP id 5b1f17b1804b1-490af3ace6cmr16671665e9.4.1780317392166; Mon, 01 Jun 2026 05:36:32 -0700 (PDT) Received: from jlelli-thinkpadt14gen4.remote.csb ([151.29.44.165]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4909c1035ebsm114374655e9.5.2026.06.01.05.36.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Jun 2026 05:36:30 -0700 (PDT) Date: Mon, 1 Jun 2026 14:36:27 +0200 From: Juri Lelli To: Valentin Schneider Cc: linux-kernel@vger.kernel.org, linux-mm@kvack.org, x86@kernel.org, Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Arnaldo Carvalho de Melo , Josh Poimboeuf , Paolo Bonzini , Arnd Bergmann , Frederic Weisbecker , "Paul E. McKenney" , Jason Baron , Steven Rostedt , Ard Biesheuvel , Sami Tolvanen , "David S. Miller" , Neeraj Upadhyay , Joel Fernandes , Josh Triplett , Boqun Feng , Uladzislau Rezki , Mathieu Desnoyers , Mel Gorman , Andrew Morton , Masahiro Yamada , Han Shen , Rik van Riel , Jann Horn , Dan Carpenter , Oleg Nesterov , Clark Williams , Tomas Glozar , Yair Podemsky , Marcelo Tosatti , Daniel Wagner , Petr Tesarik , Shrikanth Hegde Subject: Re: [PATCH v9 08/10] x86/mm/pti: Introduce a kernel/user CR3 software signal Message-ID: References: <20260505082355.1982003-1-vschneid@redhat.com> <20260505082355.1982003-9-vschneid@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260505082355.1982003-9-vschneid@redhat.com> Hello! On 05/05/26 10:23, Valentin Schneider wrote: > Later commits will rely on being able to check whether a remote CPU is > using the kernel or the user CR3. > > This software signal needs to be updated before the actual CR3 write, IOW > it always immediately precedes it: > > KERNEL_CR3_LOADED := 1 > SWITCH_TO_KERNEL_CR3 > [...] > KERNEL_CR3_LOADED := 0 > SWITCH_TO_USER_CR3 > > The variable also gets mapped into the user space visible pages. > I tried really hard not to do that, and at some point had something mostly > working with having an alias to it through the cpu_entry_area accessed like > so before the switch to the kernel CR3: > > subq $10, %rsp > sgdt (%rsp) > movq 2(%rsp), \scratch_reg /* GDT address */ > addq $10, %rsp > > movl $1, CPU_ENTRY_AREA_kernel_cr3(\scratch_reg) > > however this explodes when running 64-bit user code that invokes SYSCALL, > since the scratch reg is %rsp itself, and I figured this was enough headaches. > > This will only be really useful for NOHZ_FULL CPUs, but it should be > cheaper to unconditionally update a never-used per-CPU variable living in > its own cacheline than to check a shared cpumask such as > housekeeping_cpumask(HK_TYPE_KERNEL_NOISE) > at every entry. > > Signed-off-by: Valentin Schneider > --- Just fyi, I had to do the below to make clang happy with this. Best, Juri --- diff --git a/arch/x86/entry/calling.h b/arch/x86/entry/calling.h index deb8224b5ee48..07fabf762f700 100644 --- a/arch/x86/entry/calling.h +++ b/arch/x86/entry/calling.h @@ -186,7 +186,7 @@ For 32-bit we have the following conventions - kernel is built with .macro SWITCH_TO_KERNEL_CR3 scratch_reg:req ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI - NOTE_CR3_SWITCH \scratch_reg $1 + NOTE_CR3_SWITCH \scratch_reg 1 mov %cr3, \scratch_reg ADJUST_KERNEL_CR3 \scratch_reg mov \scratch_reg, %cr3 @@ -197,7 +197,7 @@ For 32-bit we have the following conventions - kernel is built with PER_CPU_VAR(cpu_tlbstate + TLB_STATE_user_pcid_flush_mask) .macro SWITCH_TO_USER_CR3 scratch_reg:req scratch_reg2:req - NOTE_CR3_SWITCH \scratch_reg $0 + NOTE_CR3_SWITCH \scratch_reg 0 mov %cr3, \scratch_reg ALTERNATIVE "jmp .Lwrcr3_\@", "", X86_FEATURE_PCID @@ -245,7 +245,7 @@ For 32-bit we have the following conventions - kernel is built with .macro SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg:req save_reg:req ALTERNATIVE "jmp .Ldone_\@", "", X86_FEATURE_PTI - NOTE_CR3_SWITCH \scratch_reg $1 + NOTE_CR3_SWITCH \scratch_reg 1 movq %cr3, \scratch_reg movq \scratch_reg, \save_reg /* @@ -274,7 +274,7 @@ For 32-bit we have the following conventions - kernel is built with bt $PTI_USER_PGTABLE_BIT, \save_reg jnc .Lend_\@ - NOTE_CR3_SWITCH \scratch_reg $0 + NOTE_CR3_SWITCH \scratch_reg 0 ALTERNATIVE "jmp .Lwrcr3_\@", "", X86_FEATURE_PCID /*