From: Richard Cheng <icheng@nvidia.com>
To: Fenghua Yu <fenghuay@nvidia.com>
Cc: tony.luck@intel.com, reinette.chatre@intel.com, shuah@kernel.org,
Dave.Martin@arm.com, james.morse@arm.com, babu.moger@amd.com,
linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org,
newtonl@nvidia.com, kristinc@nvidia.com, kaihengf@nvidia.com,
kobak@nvidia.com
Subject: Re: [PATCH] selftests/resctrl: Add ARM vendor detection and fix non-contig CBM check
Date: Wed, 27 May 2026 12:15:26 +0800 [thread overview]
Message-ID: <ahZvf6_MOWOhU9BJ@MWDK4CY14F> (raw)
In-Reply-To: <b1dd5e10-9121-458b-bce9-0955aa658b40@nvidia.com>
On Mon, May 25, 2026 at 07:51:16PM +0800, Fenghua Yu wrote:
> Hi, Richard,
>
> On 5/25/26 19:39, Richard Cheng wrote:
> > aarch64 has no vendor_id in /proc/cpuinfo, so detect_vendor() returns 0
> > and arch_supports_noncont_cat() falls through to "return false".
> > L3_NONCONT_CAT spuriously fails on every ARM MPAM platform.
> >
> > Define ARCH_ARM, short-circuite detect_vendor() to it on aarch64, and
> > add it to the AMD/Hygon alwasy-supports early-out in
> > arch_support_noncont_cat().
> >
> > aarch64 has many implementers (ARM 0x41, NVIDIA 0x43, etc...) but MPAM
> > mandates non-contiguous CPBM uniformly, so per-implementer bits is not
> > needed here.
> >
> > Signed-off-by: Richard Cheng <icheng@nvidia.com>
>
> I see you have three patches for selftest. Seems they are together. But they
> are not assembled in a series like [PATCH 1/3], [PATCH 2/3], [PATCH 3/3].
>
> Could you please send them in a series?
>
> Thanks.
>
> -Fenghua
Hi Fenghua,
Thanks, I'll organize them in a serie and send a v2.
Best regards,
Richard Cheng.
prev parent reply other threads:[~2026-05-27 4:15 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-26 2:39 Richard Cheng
2026-05-26 2:51 ` Fenghua Yu
2026-05-27 4:15 ` Richard Cheng [this message]
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