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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3045245d6aesm14523047eec.26.2026.05.28.05.28.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 May 2026 05:28:19 -0700 (PDT) Date: Thu, 28 May 2026 05:28:17 -0700 From: Qiang Yu To: Krzysztof Kozlowski Cc: Bjorn Andersson , Michael Turquette , Stephen Boyd , Brian Masney , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, krishna.chundru@oss.qualcomm.com Subject: Re: [PATCH v4 1/7] dt-bindings: clock: qcom,sm8550-tcsr: Add QREF/REFGEN supply properties for glymur and mahua Message-ID: References: <20260527-tcsr_qref_0527-v4-0-ded83866c9d9@oss.qualcomm.com> <20260527-tcsr_qref_0527-v4-1-ded83866c9d9@oss.qualcomm.com> <20260528-adamant-termite-of-drizzle-0c39de@quoll> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260528-adamant-termite-of-drizzle-0c39de@quoll> X-Proofpoint-ORIG-GUID: 4pO5bHUlPkBz_HPt1VGz9ikmW8ienaRR X-Proofpoint-GUID: 4pO5bHUlPkBz_HPt1VGz9ikmW8ienaRR X-Authority-Analysis: v=2.4 cv=E/r9Y6dl c=1 sm=1 tr=0 ts=6a1834e4 cx=c_pps a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=kj9zAlcOel0A:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=48uwnw2qJDGHVwkyL2oA:9 a=CjuIK1q_8ugA:10 a=bBxd6f-gb0O0v-kibOvt:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTI4MDEyNiBTYWx0ZWRfX8ta2L2KNRNsP W7qKPEma6EPNR6Rync8ZOaP0L8k+LYWeCXCxjTFZPPrHa/BTfUAppOhbbjvGFa6exh9ogbr0XFC fGlBZzPVy/NROFb5zMqGn6vrHCRHrZMFZtnZipg/WDeNdaRuMdLFmE2kyixy/nV7Vxk4p5UAlfY Lexj+m25wUCSoKrcWr9/TQhRiWNgaz+cxuSPS/bHT2A19aqbauXHB5TKl1EG/6Z10+UYFclxbFW DfU9Edcwztw+k85Wib1MX1eEfIBHhsqaPRVwyOamEv7D4FJ2SusXtDFfJNGCDOsBY348LM/IKNX vwH+Q/qrUr7+JHxLev2R3zQQoTiFIKhHq0qEu4PiS6PIkMNX2xU04pqhAwopb2RGZ4Q7Uh2BsWj 7Lv1EMEc6RkJnMTcpGViLyyv+UH216fndWY0Dj3ijUZPcHgH3RK875Pl5PvucS9ClPvKBgIb57v T4NF1HoG0x/tFkwpYlQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-05-28_03,2026-05-28_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 lowpriorityscore=0 adultscore=0 priorityscore=1501 phishscore=0 impostorscore=0 bulkscore=0 malwarescore=0 suspectscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2605280126 On Thu, May 28, 2026 at 09:57:10AM +0200, Krzysztof Kozlowski wrote: > On Wed, May 27, 2026 at 07:29:12PM -0700, Qiang Yu wrote: > > The QREF block supplies reference clocks to PCIe PHYs and requires > > dedicated LDO supplies to operate. The digital control interface for > > QREF (clkref_en registers) resides in TCSR on glymur and mahua. Since > > QREF has no dedicated DT node of its own, these supply properties are > > placed in the TCSR node which acts as the control interface for QREF. > > > > Document the supply properties for qcom,glymur-tcsr and qcom,mahua-tcsr. > > Both SoCs share the same QREF TX/RPT/RX component naming, but differ in > > topology: > > > > Glymur has two independent QREF blocks fed by REFGEN3 and REFGEN4. Mahua > > has a single QREF block fed by REFGEN3 only. > > > > Mark the relevant supplies as required per compatible using allOf/if/then > > conditionals. > > I don't think you implemented my last comments. You need own binding > file. > Thanks. Do you mean qcom,glymur-tcsr and qcom,mahua-tcsr should be moved out of qcom,sm8550-tcsr.yaml into their own binding file, e.g. qcom,glymur-tcsr.yaml? Can I use a single file for Glymur and Mahua? - Qiang Yu > Best regards, > Krzysztof >