From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 834CF18DB1A for ; Fri, 29 May 2026 04:02:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780027381; cv=none; b=YiauTBh/hdjlOkrFwsHxQIkMpi+6XuHHl1O6K+h04UszTS5H3rlfvQz92dD+9QJcpHPpYGb0/EYy81F9Uco1dgcMJ/Z8HYZj7imDMmqKDbH1Fajko5nrNPntb1wRrA3fWoVrx0E3nJH2nsO0wGFRUi4W8FCCUPW+f2gDfFCT8AE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780027381; c=relaxed/simple; bh=eDyqfPL3Tk2ANdqi4jSCbSbhgcCNem97wosvoWpsFcg=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=kHlvcL8Rl+uBEGu2MLjQAhj1Seh5Qu01M2WY/ZPW1/hrKeQoBEXnJFc6pVmv+8YWVT2vP4z/e15N2RElmrheEzRh5pKUJYYEAGt6JmWcDamhDFZawKzBos5sBVU8YSTt0fJrV84oBXqhVWwpIMRUr0+mavTA/dNaPHBA55OPSe4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=OOY3mvD2; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="OOY3mvD2" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7B0CC16A3; Thu, 28 May 2026 21:02:52 -0700 (PDT) Received: from localhost (a079125.arm.com [10.164.21.37]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 82F1E3F7B4; Thu, 28 May 2026 21:02:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1780027377; bh=eDyqfPL3Tk2ANdqi4jSCbSbhgcCNem97wosvoWpsFcg=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=OOY3mvD22sd6y3WIPIIBcAbQvrNOHJdbg8VSwgi08Y8G4+HVYqhi78mSOgyEElCPS Ro423BqzSe1PsgPppGukcVfWG5BAtkTRz5nbljRvC3GK70b/CNF/WOmP+OAVY9L0p6 3RicJRMfamLoi/GNNA6iHWitua0Dnln1bXAOOp9Y= Date: Fri, 29 May 2026 09:32:52 +0530 From: Linu Cherian To: Ryan Roberts Cc: Anshuman Khandual , linux-arm-kernel@lists.infradead.org, Catalin Marinas , Will Deacon , Mark Rutland , Lorenzo Stoakes , Andrew Morton , David Hildenbrand , Mike Rapoport , Usama Arif , linux-kernel@vger.kernel.org, linux-mm@kvack.org Subject: Re: [RFC V2 13/14] arm64/mm: Add an abstraction level for tlbi_op Message-ID: References: <20260513044547.4128549-1-anshuman.khandual@arm.com> <20260513044547.4128549-14-anshuman.khandual@arm.com> <37917d56-ae26-4789-ac4c-15f8ee12398b@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <37917d56-ae26-4789-ac4c-15f8ee12398b@arm.com> Hi Ryan, On Wed, May 27, 2026 at 03:50:10PM +0100, Ryan Roberts wrote: > On 13/05/2026 05:45, Anshuman Khandual wrote: > > From: Linu Cherian > > > > With FEAT_D128, a new instruction aka TLBIP is being introduced for the TLB > > range operations which has an argument size of 128 bit. > > nit: TLB range operations -> TLBI-by-range operations ? Ack. > > > > > Add an abstraction level to void (*tlbi_op)(u64 arg) helpers to support the > > D128 variations when applicable. > > > > No functional changes are introduced with this patch. > > > > Signed-off-by: Linu Cherian > > Signed-off-by: Anshuman Khandual > > --- > > arch/arm64/include/asm/tlbflush.h | 70 ++++++++++++++++--------------- > > 1 file changed, 37 insertions(+), 33 deletions(-) > > > > diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h > > index c0bf5b398041..361d74ef8016 100644 > > --- a/arch/arm64/include/asm/tlbflush.h > > +++ b/arch/arm64/include/asm/tlbflush.h > > @@ -162,49 +162,53 @@ static inline void sme_dvmsync_batch(struct arch_tlbflush_unmap_batch *batch) > > > > #define TLBI_TTL_UNKNOWN INT_MAX > > > > -typedef void (*tlbi_op)(u64 arg); > > +typedef u64 tlbi_args_t; > > nit: tlbi_args_t -> tlbi_arg_t ? Ack. -- Thanks, Linu Cherian.