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Wed, 10 Jun 2026 02:59:04 -0700 (PDT) Date: Wed, 10 Jun 2026 10:59:01 +0100 From: William Bright To: Vladimir Zapolskiy Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Ram Boukobza , Tendai Makumire Subject: Re: [PATCH v2] arm64: dts: qcom: sm8550: add SDHC4 controller node Message-ID: References: <20260427-sm8550-sdhc4-support-v2-1-a4241f43ecd5@imd-tec.com> <5a5cbf8f-07ef-419a-8d30-c1b0b2786312@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <5a5cbf8f-07ef-419a-8d30-c1b0b2786312@linaro.org> On Wed, Jun 10, 2026 at 11:21:53AM +0300, Vladimir Zapolskiy wrote: > FWIW due to https://www.nxp.com/docs/en/data-sheet/IW416.pdf "10.7.1 VIO_SD > DC characteristics" SDR104 speed mode is not supported by the module, thus > the selection of the SDR50 speed mode on the host side sounds to be correct > in your case. > > In SDR50 speed mode gcc_sdcc4_apps_clk clock frequency should be exactly > 100MHz, and since it differs, it has an impact during the tuning phase. > > Definitely clk/qcom/gcc-sm8550.c says that the maximum supported frequency > is 75MHz, the same is found in the downstream v5.15 kernel: > > static const struct freq_tbl ftbl_gcc_sdcc4_apps_clk_src[] = { > F(400000, P_BI_TCXO, 12, 1, 4), > F(25000000, P_GCC_GPLL0_OUT_EVEN, 12, 0, 0), > F(37500000, P_GCC_GPLL0_OUT_EVEN, 8, 0, 0), > F(75000000, P_GCC_GPLL0_OUT_EVEN, 4, 0, 0), > { } > }; > > Can you dump CAPS1 register value of SM8550 SDHC4? What does it say about > SDR50 mode support and need for SDR50 mode tuning? > > -- > Best wishes, > Vladimir CAPS0 and CAPS1 are below: sdhci_msm 8844000.mmc: CAPS0: 0x3029c8b2 CAPS1: 0x0000a08b For CAPS1: Bit 0 (SDR50 support) = 1 Bit 13 (Use Tuning for SDR50) = 1 It looks to report that SDR50 is supported with tuning required. Best regards, Will