From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 118733DA5B9 for ; Thu, 11 Jun 2026 11:26:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781177189; cv=none; b=k40HSfQnvVCWY6tRK65ksWB5R1UOF1J2EyKGUymgtkK3wXmYDhKCZZc5j676MKLRZbzN8No+w+HekRQ0iibOdFW4K+Lje4R58QIXxd/bDwOJoFNssHiUt8K6SxVK/cQZHQZ7k/jnB+boGBx7gcra5RW59uF2RI7LgJwNqoNmsNc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781177189; c=relaxed/simple; bh=yN/OMa9/5RxcXmTOHNw26DQJoaPb75dMdB5j+WxmqFQ=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=MghWJD2/FccD2l0sHZV34qMItXGky9bimTJ9hDZ1LGtKhdVwb0euiKOeQU971C2lKNhxAqHz8XRhz+4igOwdI8vR4f9yjwyoLJBBpF00q9UlCJBOUFhZKKCuETF9Xnyjk4I7GmInAFr3mezckf5oGL/s4eB/TgCd/niQbTjtOwM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=byfHpEwl; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="byfHpEwl" Received: by smtp.kernel.org (Postfix) with ESMTPSA id CDE651F00893; Thu, 11 Jun 2026 11:26:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1781177187; bh=jt/4CoziO1pfujnzGp8Dx/334/iuWrZI1G8H43vKVzU=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=byfHpEwlcUt9heMsyrQH4N9eBo6mUbveEBwEpCRSBIcZrJBykhJLF8NObO9WSzETZ zWQLO1lolxvUZcl/j7ihhMOrCAs/BYEvbNeHnh3PGDn3efBgBY/Pff2IK2xU+AhV7t uZMVrWESFygYvONgEEssIB6/sUTxtTyrAaXuLW4Jqa+FhzWHkTiweMvz8KbVsza9Dk BmjWNsH5I9VoCTfQEuG9PO3KpM+TnVms0LXGSXYyC9WJjLps7uTvsQQ0LfLEvMpO8H afgm85GUgv8xLs3HqszPJTP5Rp7CyVMngjHVr3eAksR4TJ+O/zdz3tsEmghAasKPXp 08Cg2GCtl2nUQ== Date: Thu, 11 Jun 2026 16:56:23 +0530 From: Vinod Koul To: Cristian Ciocaltea Cc: Neil Armstrong , Heiko Stuebner , Algea Cao , Dmitry Baryshkov , kernel@collabora.com, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Thomas =?iso-8859-1?Q?Niederpr=FCm?= , Simon Wright Subject: Re: [PATCH v2 0/6] phy: rockchip: samsung-hdptx: Clock fixes and API transition cleanups Message-ID: References: <20260511-hdptx-clk-fixes-v2-0-664e41379cab@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On 03-06-26, 13:27, Cristian Ciocaltea wrote: > On 5/20/26 10:05 PM, Cristian Ciocaltea wrote: > > Hi Vinod, > > > > On 5/11/26 9:21 PM, Cristian Ciocaltea wrote: > >> This series provides a set of bug fixes and cleanups for the Rockchip > >> Samsung HDPTX PHY driver. > >> > >> The first part of the series (i.e. PATCH 1 & 2) addresses clock rate > >> calculation and synchronization issues. Specifically, it fixes edge > >> cases where the PHY PLL is pre-programmed by an external component (like > >> a bootloader) or when changing the color depth (bpc) while keeping the > >> modeline constant. Because the Common Clock Framework .set_rate() > >> callback might not be invoked if the pixel clock remains unchanged, this > >> previously led to out-of-sync states between CCF and the actual HDMI PHY > >> configuration. > >> > >> The second part focuses on code cleanups and modernizing the register > >> access. Now that dw_hdmi_qp driver has fully switched to using > >> phy_configure(), we can drop the deprecated TMDS rate setup workarounds > >> and the restrict_rate_change flag logic. Finally, it refactors the > >> driver to consistently use standard bitfield macros. > >> > >> Signed-off-by: Cristian Ciocaltea > >> --- > >> Changes in v2: > >> - Collected Tested-by tags from Thomas and Simon > >> - Fixed a typo in commit description of patch 1 > >> - Added a comment in patch 2 explaining why PLL config errors are > >> ignored for rk_hdptx_phy_consumer_get() > >> - Added a missed FIELD_GET conversion for lcpll_hw.pms_sdiv in patch 6 > >> - Rebased onto latest phy/fixes > >> - Link to v1: https://lore.kernel.org/r/20260227-hdptx-clk-fixes-v1-0-f998f2762d0f@collabora.com > > > > In case you missed my comments from last week on the Sashiko AI review findings > > - in short, I don't think there is anything to worry about and the series should > > be fine to apply as-is. Please let me know if you would still prefer a new > > revision. > Kind reminder.. Please post a new revision based on phy/next Thanks -- ~Vinod