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From: Mark Brown <broonie@debian.org>
To: Vishwaroop A <va@nvidia.com>
Cc: Thierry Reding <thierry.reding@kernel.org>,
	Jon Hunter <jonathanh@nvidia.com>,
	Laxman Dewangan <ldewangan@nvidia.com>,
	Sowjanya Komatineni <skomatineni@nvidia.com>,
	Breno Leitao <leitao@debian.org>,
	Suresh Mangipudi <smangipudi@nvidia.com>,
	Krishna Yarlagadda <kyarlagadda@nvidia.com>,
	linux-tegra@vger.kernel.org, linux-spi@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 1/3] spi: tegra210-quad: Convert to hard IRQ with high-priority workqueue
Date: Fri, 12 Jun 2026 16:29:42 +0100	[thread overview]
Message-ID: <aiwl5ggiRVGHWSpR@sirena.co.uk> (raw)
In-Reply-To: <552afd84ee31c9e475ed1344ea9349af01eacfa1.1781037385.git.va@nvidia.com>

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On Wed, Jun 10, 2026 at 06:24:00AM +0000, Vishwaroop A wrote:

> @@ -1506,6 +1508,19 @@ static irqreturn_t handle_dma_based_xfer(struct tegra_qspi *tqspi)
>  	long wait_status;
>  	int num_errors = 0;
>  
> +	/*
> +	 * Snapshot curr_xfer under the lock before the (potentially long)
> +	 * DMA waits below. The timeout path can clear tqspi->curr_xfer
> +	 * concurrently; using the local copy keeps the subsequent dma_unmap
> +	 * and FIFO-drain steps consistent with the transfer that actually
> +	 * started, and lets us bail safely if cleanup already happened.
> +	 */
> +	spin_lock_irqsave(&tqspi->lock, flags);
> +	t = tqspi->curr_xfer;
> +	spin_unlock_irqrestore(&tqspi->lock, flags);
> +	if (!t)
> +		return IRQ_HANDLED;
> +
>  	if (tqspi->cur_direction & DATA_DIR_TX) {
>  		if (tqspi->tx_status) {
>  			if (tqspi->tx_dma_chan)

This can be called from both tegra_qspi_work_handler() and
tegra_qspi_handle_timeout() - I can't see what stops them both handling
and completing the same transfer simultaneously?

> +static void tegra_qspi_work_handler(struct work_struct *work)
>  {
> -	struct tegra_qspi *tqspi = context_data;

> +	 * Check if the timeout handler already processed this transfer.
> +	 * Can happen if the workqueue was delayed and the timeout fired
> +	 * first. In that case there is nothing to do: tegra_qspi_start_
> +	 * {cpu,dma}_based_transfer() at the start of the next transfer
> +	 * (or the next message) re-enables interrupts.
>  	 */
> -	spin_lock_irqsave(&tqspi->lock, flags);
>  	if (!tqspi->curr_xfer) {
>  		spin_unlock_irqrestore(&tqspi->lock, flags);
> -		/* Spurious interrupt - transfer not ready */
> -		if (!(status & QSPI_RDY))
> -			return IRQ_NONE;
> -		/* Real interrupt, already handled by timeout path */
> -		return IRQ_HANDLED;
> +		return;
>  	}

Can't the timeout handler also be running at the same time as this
rather than already having handled things?

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  reply	other threads:[~2026-06-12 15:29 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-10  6:23 [PATCH v4 0/3] spi: tegra210-quad: Improve interrupt handling for loaded systems Vishwaroop A
2026-06-10  6:24 ` [PATCH v4 1/3] spi: tegra210-quad: Convert to hard IRQ with high-priority workqueue Vishwaroop A
2026-06-12 15:29   ` Mark Brown [this message]
2026-06-10  6:24 ` [PATCH v4 2/3] spi: tegra210-quad: Cache TRANS_STATUS in ISR for timeout handler Vishwaroop A
2026-06-12 16:08   ` Mark Brown
2026-06-10  6:24 ` [PATCH v4 3/3] spi: tegra210-quad: Process small PIO transfers in hard IRQ context Vishwaroop A

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