From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 97C8435F191 for ; Fri, 12 Jun 2026 20:29:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781296197; cv=none; b=sSj6iR3xHEK/gLRb6qKIcwy+5PZt8i1a/7CFnL5c78Yf+PjLyfBJ+w8ZiGJAzuyHJ6f8FiOFS39x2oMTsp3ugmXa6uInDrE92yx7GUfxtF6YJ0r7x4PFR9qewqsoc/nEcPljexMb7JD/XVCOdCLjpgZ0MVM/hrm96pMnpeAzGBk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781296197; c=relaxed/simple; bh=BycU0RBtpk8VKl77/K41yrPXDbWPO4U4phAHWKKHwGo=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=ZmyWcUsTjXkEqSzTWuXAdTKVKdLSV8GgTEK2QaBrxtvHqyQd+YM0g+N4TuJ4cta4oyGDiIe7718AUk4IqK19J3hAqO8XjWAlhJemdvi/j1bNYgY2JeQniEJRuHtdJx8/HHGHPHj/HjlQbWnkY/5ONj1/snHcgHhXyybvn71E2RI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=uWXikNWE; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=NB1FSwCS; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="uWXikNWE"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="NB1FSwCS" Date: Fri, 12 Jun 2026 22:29:52 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1781296194; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=8vwoz0igJWR54pTd381ZhwkNQzpYMtxCI2YrZQmxwNg=; b=uWXikNWEMeRvSsjfMNu891+W7zdRZGSKMyoQdbnaJUkJz39zPTbybdX7oq+dDsbQlNBC++ ub0WE3t2xtxtImNhmfQ83jAla0lNkCirsG9sA6kJlnHGLdBjJbyDhE12TAaLTyVrazXrji P0W4ECeSqHzSsPsogPeNLMhu5T9JhupJTLitnkHzBcZ1WA5kfsIGOHASscAITxhu19b2Jy XxWZz7owCG6APVZIEzFCkX21HSkduBUqyhgk4AsYM27uOHPAxy9Qm1ZfFM18DWFGkKj9MN DyvGxmTkx1TB3V5pICq+YkfKm/b3squ146garaMCKoeJxEbcxbJneNYFtFkmww== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1781296194; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=8vwoz0igJWR54pTd381ZhwkNQzpYMtxCI2YrZQmxwNg=; b=NB1FSwCSHRV66X4e8w6mQqURJoDkJLbbrf7uxAuH2ZMpoHm8KCcAKrz0SNDXBXaXWbPjUj gRnIixz01u/BlLAQ== From: "Ahmed S. Darwish" To: Maciej Wieczor-Retman Cc: Borislav Petkov , Dave Hansen , Ingo Molnar , Thomas Gleixner , Andrew Cooper , "H. Peter Anvin" , Christian Ludloff , Sohil Mehta , John Ogness , x86@kernel.org, x86-cpuid@lists.linux.dev, LKML Subject: Re: [PATCH v7 111/120] x86/percpu: Add offset argument to x86_this_cpu_test_bit() Message-ID: References: <20260528153923.403473-1-darwi@linutronix.de> <20260528153923.403473-112-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Mon, 01 Jun 2026, Maciej Wieczor-Retman wrote: > > On 2026-05-28 at 17:39:13 +0200, Ahmed S. Darwish wrote: > > > > diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h > > index 520949560138..b12bde4986b5 100644 > > --- a/arch/x86/include/asm/cpufeature.h > > +++ b/arch/x86/include/asm/cpufeature.h > > @@ -56,7 +56,7 @@ extern const char * const x86_bug_flags[NBUGINTS*32]; > > > > #define this_cpu_has(bit) \ > > (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \ > > - x86_this_cpu_test_bit(bit, cpu_info.x86_capability)) > > + x86_this_cpu_test_bit(bit, cpu_info.x86_capability, 0)) > > I think the same change needs to be applied in the same arch/um directory since > it has a matching this_cpu_has() implementation and it uses x86's percpu.h. arch/um/ has its own x86_capability[] implementation. There are much higher priorities for this series than this. Thanks! Ahmed