Re: [PATCH] ASoC: cs530x: Fix expected MCLK rates for CS5302/4/8

[Charles Keepax <ckeepax@opensource.cirrus.com>]

On Wed, Jun 17, 2026 at 04:47:53PM +0200, Ahmad Fatoum wrote:
> When this driver was first added, it accepted rates of 24.56 MHz and
> 22.572 MHz for the MCLK when PLL bypass is enabled.
> 
> These rates seem to have no basis in the datasheets and were thus replaced
> with 45.1584 MHz and 49.152 MHz, respectively, in commit e7ab858390f2
> ("ASoC: cs530x: Correct MCLK reference frequency values").
> 
> While the new rates are indeed correct for the CS4xxx ICs[0][1][2][3],
> they are incorrect for the CS530x ICs the driver was originally written to
> support as the MCLK frequencies are halved there[4][5][6].
> 
> Fix this by checking against the correct type-appropriate rates.
> 
> While at it, drop the CS530X_SYSCLK_REF_* macros. They arguably confuse
> more than they help, especially as they are not applicable to the
> cs5302/4/8.
> 
> [0]: https://statics.cirrus.com/pubs/proDatasheet/CS4282P_DS1318F1.pdf
> [1]: https://statics.cirrus.com/pubs/proDatasheet/CS4302P_DS1315F1.pdf
> [2]: https://statics.cirrus.com/pubs/proDatasheet/CS4304P_DS1316F1.pdf
> [3]: https://statics.cirrus.com/pubs/proDatasheet/CS4308P_DS1317F1.pdf
> [4]: https://statics.cirrus.com/pubs/proDatasheet/CS5302P_DS1312F1.pdf
> [5]: https://statics.cirrus.com/pubs/proDatasheet/CS5304P_DS1313F1.pdf
> [6]: https://statics.cirrus.com/pubs/proDatasheet/CS5308P_DS1314F1.pdf
> 
> Fixes: 2884c29152c0 ("ASoC: cs530x: Support for cs530x ADCs")
> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> ---

Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com>

Thanks,
Charles