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Tue, 23 Jun 2026 05:12:46 +0000 Date: Mon, 22 Jun 2026 22:12:44 -0700 From: Matthew Brost To: Jonathan Cavitt CC: , , , , , , , , , , , Subject: Re: [PATCH v4 1/2] drm/xe/pagefault: Add SRCID to pagefault struct Message-ID: References: <20260618153312.877948-1-jonathan.cavitt@intel.com> <20260618153312.877948-2-jonathan.cavitt@intel.com> Content-Type: text/plain; charset="iso-8859-1" Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260618153312.877948-2-jonathan.cavitt@intel.com> X-ClientProxiedBy: BY1P220CA0003.NAMP220.PROD.OUTLOOK.COM (2603:10b6:a03:59d::10) To PH7PR11MB6522.namprd11.prod.outlook.com (2603:10b6:510:212::12) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH7PR11MB6522:EE_|IA1PR11MB8098:EE_ X-MS-Office365-Filtering-Correlation-Id: 7553efc4-0301-486a-a4c2-08ded0e61038 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|23010399003|376014|22082099003|18002099003|56012099006|11063799006|4143699003; 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> - pf.consumer.asid = FIELD_GET(PFD_ASID, msg[1]); Maybe a BUILD_ON_BUG(XE_MAX_ASID > XE_PAGEFAULT_ASID_MASK); > + pf.consumer.id = FIELD_PREP(XE_PAGEFAULT_ASID_MASK, > + FIELD_GET(PFD_ASID, msg[1])) | > + FIELD_PREP(XE_PAGEFAULT_SRCID_MASK, > + FIELD_GET(PFD_SRC_ID, msg[0])); > pf.consumer.access_type = FIELD_GET(PFD_ACCESS_TYPE, msg[2]) | > (FIELD_GET(PFD_PREFETCH, msg[2]) ? XE_PAGEFAULT_ACCESS_PREFETCH : 0); > if (FIELD_GET(XE2_PFD_TRVA_FAULT, msg[0])) > diff --git a/drivers/gpu/drm/xe/xe_pagefault.c b/drivers/gpu/drm/xe/xe_pagefault.c > index dd3c068e1a39..2a21203b1a2a 100644 > --- a/drivers/gpu/drm/xe/xe_pagefault.c > +++ b/drivers/gpu/drm/xe/xe_pagefault.c > @@ -169,6 +169,7 @@ static struct xe_vm *xe_pagefault_asid_to_vm(struct xe_device *xe, u32 asid) > > static int xe_pagefault_service(struct xe_pagefault *pf) > { > + u32 asid = FIELD_GET(XE_PAGEFAULT_ASID_MASK, pf->consumer.id); Nit: can you move this below the struct stack variables. > struct xe_gt *gt = pf->gt; > struct xe_device *xe = gt_to_xe(gt); > struct xe_vm *vm; > @@ -180,7 +181,7 @@ static int xe_pagefault_service(struct xe_pagefault *pf) > if (pf->consumer.fault_type_level == XE_PAGEFAULT_TYPE_LEVEL_NACK) > return -EFAULT; > > - vm = xe_pagefault_asid_to_vm(xe, pf->consumer.asid); > + vm = xe_pagefault_asid_to_vm(xe, asid); > if (IS_ERR(vm)) > return PTR_ERR(vm); > > @@ -242,14 +243,16 @@ static bool xe_pagefault_queue_pop(struct xe_pagefault_queue *pf_queue, > > static void xe_pagefault_print(struct xe_pagefault *pf) > { > - xe_gt_info(pf->gt, "\n\tASID: %d\n" > + xe_gt_info(pf->gt, "\n\tASID: %ld\n" > "\tFaulted Address: 0x%08x%08x\n" > "\tFaultType: %lu\n" > "\tAccessType: %lu\n" > "\tFaultLevel: %lu\n" > "\tEngineClass: %d %s\n" > - "\tEngineInstance: %d\n", > - pf->consumer.asid, > + "\tEngineInstance: %d\n" > + "\tSRCID: 0x%02lx\n", > + FIELD_GET(XE_PAGEFAULT_ASID_MASK, > + pf->consumer.id), > upper_32_bits(pf->consumer.page_addr), > lower_32_bits(pf->consumer.page_addr), > FIELD_GET(XE_PAGEFAULT_TYPE_MASK, > @@ -260,7 +263,9 @@ static void xe_pagefault_print(struct xe_pagefault *pf) > pf->consumer.fault_type_level), > pf->consumer.engine_class, > xe_hw_engine_class_to_str(pf->consumer.engine_class), > - pf->consumer.engine_instance); > + pf->consumer.engine_instance, > + FIELD_GET(XE_PAGEFAULT_SRCID_MASK, > + pf->consumer.id)); > } > > static void xe_pagefault_save_to_vm(struct xe_device *xe, struct xe_pagefault *pf) > @@ -273,7 +278,8 @@ static void xe_pagefault_save_to_vm(struct xe_device *xe, struct xe_pagefault *p > * mode, return VM anyways. > */ > down_read(&xe->usm.lock); > - vm = xa_load(&xe->usm.asid_to_vm, pf->consumer.asid); > + vm = xa_load(&xe->usm.asid_to_vm, > + FIELD_GET(XE_PAGEFAULT_ASID_MASK, pf->consumer.id)); > if (vm) > xe_vm_get(vm); > else > @@ -474,8 +480,9 @@ static bool xe_pagefault_queue_full(struct xe_pagefault_queue *pf_queue) > */ > int xe_pagefault_handler(struct xe_device *xe, struct xe_pagefault *pf) > { > + u32 asid = FIELD_GET(XE_PAGEFAULT_ASID_MASK, pf->consumer.id); Same nit as above. Otherwise LGTM. Matt > struct xe_pagefault_queue *pf_queue = xe->usm.pf_queue + > - (pf->consumer.asid % XE_PAGEFAULT_QUEUE_COUNT); > + (asid % XE_PAGEFAULT_QUEUE_COUNT); > unsigned long flags; > bool full; > > @@ -489,7 +496,7 @@ int xe_pagefault_handler(struct xe_device *xe, struct xe_pagefault *pf) > } else { > drm_warn(&xe->drm, > "PageFault Queue (%d) full, shouldn't be possible\n", > - pf->consumer.asid % XE_PAGEFAULT_QUEUE_COUNT); > + asid % XE_PAGEFAULT_QUEUE_COUNT); > } > spin_unlock_irqrestore(&pf_queue->lock, flags); > > diff --git a/drivers/gpu/drm/xe/xe_pagefault_types.h b/drivers/gpu/drm/xe/xe_pagefault_types.h > index c4ee625b93dd..2213cea886c7 100644 > --- a/drivers/gpu/drm/xe/xe_pagefault_types.h > +++ b/drivers/gpu/drm/xe/xe_pagefault_types.h > @@ -65,8 +65,13 @@ struct xe_pagefault { > struct { > /** @consumer.page_addr: address of page fault */ > u64 page_addr; > - /** @consumer.asid: address space ID */ > - u32 asid; > +#define XE_PAGEFAULT_ASID_MASK GENMASK(23, 0) > +#define XE_PAGEFAULT_SRCID_MASK GENMASK(31, 24) > + /** > + * @consumer.id: address space ID and SRCID, folded into one > + * to keep size compact > + */ > + u32 id; > /** > * @consumer.access_type: access type and prefetch flag packed > * into a u8. > -- > 2.53.0 >