From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 120A53F8896 for ; Tue, 21 Jul 2026 10:07:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784628436; cv=none; b=QJBjO2R9wzxHmYFpuYCK7NFfdZfpLBzBloJsXc3nlsXqIT5iZ9THqCqYGseyIwmYF9fkdcQPZz9viF7MNyTZETJx4MUwoqs2SwRmQWMidpwfHrsvPaLskMh9uicWda2GeJ/Tsv2ZEEJX3HWatb+nDHXSJjAXlyIKarol9zqe2dk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784628436; c=relaxed/simple; bh=ul25+FSRUq9Z+4quIcfxdE6StN81pOFokn8RGkQEvj0=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=YUebwLQ5Hn57/kz5U4Nj2AifTFs7iwuMOpXXwaNTiu4t0L+dpksckK/4nako+KsFROxeZsiOYcDM2ZPCuVLrXDa8sCq0JyXkmMes9XYvttSIQOwAzkFDQGub0c11cyyUr9ORLq3cDSegM7q6G/xWfmdfVAISZEo05QdwdhBRhwc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=n0SI0ZWW; arc=none smtp.client-ip=198.175.65.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="n0SI0ZWW" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1784628435; x=1816164435; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=ul25+FSRUq9Z+4quIcfxdE6StN81pOFokn8RGkQEvj0=; b=n0SI0ZWW3gOoonN/YIEnY7kFD+YKkN4mZF6FhktYFgdksWkp5Q1N/H0A hu7gJYSaUucU+0eSb64pTwL1rePtpZ/EdVG2KgDSaxPhBUuNkXBZeBjzf Xd+0WBbljy0DnhshX26PkpwoCykRNMUJGAgq3qJpIm4SFhI0ntzDkQoRy YJKYnQ9BiIx+GX/SEcHGsmBn9tXkGnhv56UeL5JeI+AYcASjLyRBsQOBi Z+zsG9IXzJ2eynWhdvXOGhTydzCI+G0LchJXT3fDLpzYI7bXXLfiKobm5 g8GfJHqdjnjR8ovrPJQkVBYwyLVSRJdd6wfeuLpc6/RAWJn9RbvpUPNmq Q==; X-CSE-ConnectionGUID: 2NzT8c3tTrq7b58ChLhIyg== X-CSE-MsgGUID: 1pfNs1BPQtKQcfpXLpYDfA== X-IronPort-AV: E=McAfee;i="6800,10657,11852"; a="95584665" X-IronPort-AV: E=Sophos;i="6.25,176,1779174000"; d="scan'208";a="95584665" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jul 2026 03:07:14 -0700 X-CSE-ConnectionGUID: BBMgAyePSqKuV+oxnQ220w== X-CSE-MsgGUID: IbhtkuNEQ1qfvobN7cyJOg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,176,1779174000"; d="scan'208";a="261274823" Received: from ncintean-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.245.67]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jul 2026 03:07:09 -0700 Date: Tue, 21 Jul 2026 13:07:07 +0300 From: Andy Shevchenko To: Fengnan Chang Cc: hch@lst.de, axboe@kernel.dk, gang.cao@intel.com, jun.i.jin@intel.com, jun1.zeng@intel.com, kbusch@kernel.org, liang.a.fang@intel.com, linux-kernel@vger.kernel.org, linux-nvme@lists.infradead.org, sagi@grimberg.me, tglx@kernel.org, yong.hu@intel.com, guzebing@bytedance.com Subject: Re: [PATCH v1 1/1] nvme-pci: adaptive interrupt coalescing Message-ID: References: <20260715075703.15578-1-jun1.zeng@intel.com> <20260715075703.15578-2-jun1.zeng@intel.com> <20260720150539.GB17986@lst.de> <20260721083739.69676-1-changfengnan@bytedance.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260721083739.69676-1-changfengnan@bytedance.com> Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo On Tue, Jul 21, 2026 at 04:37:39PM +0800, Fengnan Chang wrote: > The patch is included below. The above in this case can be moved to cover letter, in this form it's harder for maintainers to apply this. ... > From 1c84b5afc906e780e1dbd2ee186251f9de2716b5 Mon Sep 17 00:00:00 2001 > From: Fengnan Chang > Date: Tue, 21 Jul 2026 12:31:46 +0800 > Subject: [PATCH] nvme-pci: adaptively poll busy queues from threaded > interrupts > > On systems with multiple fast NVMe devices, hard IRQ completion > processing can become CPU-bound and cap 4K random-read throughput > before the devices are saturated. > > Add adaptive polling for busy interrupt-driven queues. Track the SQ head > reported by completions while the CQE is still owned by the host. After > the hard IRQ reaps pending CQEs, wake the IRQ thread and mask the queue > interrupt when the number of SQ entries not yet consumed reaches a high > watermark. Poll in the IRQ thread until the queue drops below a low > watermark or a bounded loop count is reached, then reenable the > interrupt. > > Only enable adaptive polling when the controller has independent > vectors, as masking a shared single vector could suppress unrelated > queues. Expose the enable switch, watermarks, loop bound, and sleep > interval as module parameters. ... > +static irqreturn_t nvme_adaptive_poll(int irq, void *data) > { > struct nvme_queue *nvmeq = data; > + unsigned int loops = 0; Unneeded. See below how. > + unsigned int max_loops = READ_ONCE(adaptive_poll_max_loops); > + unsigned int sleep_min = READ_ONCE(adaptive_poll_sleep_min_us); > + unsigned int sleep_max = READ_ONCE(adaptive_poll_sleep_max_us); > > - if (nvme_cqe_pending(nvmeq)) > - return IRQ_WAKE_THREAD; > - return IRQ_NONE; > + do { > + if (nvme_cqe_pending(nvmeq)) > + nvme_irq(irq, data); > + if (nvme_adaptive_poll_should_stop(nvmeq)) > + break; > + usleep_range(sleep_min, sleep_max); fsleep() ? This automatically makes the upper bound ~25% of the requested value. Supplying max in this situation makes not much sense. > + } while (++loops < max_loops); } while (--max_loops); > + enable_irq(irq); > + return IRQ_HANDLED; > +} -- With Best Regards, Andy Shevchenko