From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9AB123EB10B for ; Fri, 17 Jul 2026 11:31:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784287868; cv=none; b=VZ29bJfIWQLHS9tjiE5C55pHjjwB9H3ckwkoY7jhergbu0c1S93vVtgy02LJDJJMQCJVZM0wxANqqMocqCE/xSvt8Wx6PKJRusjwQL/TYKiSX/tZay18GEJGCeuJFvOs9xwzGpVSzTD+woMiWlEfayP1+thpsfVO74vBf9QEuwE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784287868; c=relaxed/simple; bh=9q7YdaTLmGNLRmVuIGgAD5cogU0Lk4S1Xt+G9cNrkeA=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=q1Qwf6SiAaLv+J50QB8jmJaVkiDvY4qgv3DMweB2MjMTxvZjMbHoMk7JtDYQeEdpP1wNnzSokM1JyOdXzUafhrYaZZl5bi9xzJeyQ5qB7QLWw7v43lrzOmDnJyP4Xp1nz3mO2jOfAYQ14t4y15jxc4hw30tQ0gkNUcGgHsvox0M= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=RJ6waE8J; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="RJ6waE8J" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5A3EA1F000E9; Fri, 17 Jul 2026 11:31:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1784287867; bh=s/h7AFpYYjfr4QRK5vZ0HEp1r6v/217c+9SOII2nfXY=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=RJ6waE8J5De7CGz3kfzL1GYaHOVqcIMu9z2HzrtrB4BDaZe3CBznCa6qekPUT52BG q59cTRh0FkDXzqk05NB/RNFR5hrRIglXq1KOBY480Jqp53WBwTH/+M/I7gez29PtF5 FcBtgZAMKqqTSnH/wIHCb3JbwRWsSG+m/ZR8uRgFIlKoUBdSY1A5mDw9L1iTytNqj8 9ItG8frbfB/5CtyqMOj1P5+Z9PYVYqB3C8OdNeA2i7GdgpLnT9AHtwKk0fdw0oSKUD bOgebkta91WA+pWyAqnoW4HZfDd+0GcrEAMhuuwPci17UO6sqbZQwL8SXf+nrJt1tK bDGgbyIGuN+Qg== Date: Fri, 17 Jul 2026 12:31:03 +0100 From: Will Deacon To: Bradley Morgan Cc: Catalin Marinas , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] arm64: sleep: dedup the sleep_save_stash slot lookup Message-ID: References: <20260705192331.23150-1-include@grrlz.net> <20260705192331.23150-3-include@grrlz.net> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Thu, Jul 16, 2026 at 05:55:38PM +0100, Bradley Morgan wrote: > On July 16, 2026 3:35:48 PM GMT+01:00, Will Deacon wrote: > >On Sun, Jul 05, 2026 at 07:23:31PM +0000, Bradley Morgan wrote: > >> Both __cpu_suspend_enter() and _cpu_resume() open code the same MPIDR > >> hash lookup. Factor it into a get_sleep_stash_slot macro. > >> > >> Signed-off-by: Bradley Morgan > >> --- > >> arch/arm64/kernel/sleep.S | 55 +++++++++++++++++++++------------------ > >> 1 file changed, 30 insertions(+), 25 deletions(-) > >> > >> diff --git a/arch/arm64/kernel/sleep.S b/arch/arm64/kernel/sleep.S > >> index e112b8537f10..8820a131aef7 100644 > >> --- a/arch/arm64/kernel/sleep.S > >> +++ b/arch/arm64/kernel/sleep.S > >> @@ -64,6 +64,31 @@ > >> lsr \mask ,\mask, \rs3 > >> orr \dst, \dst, \mask // dst|=(aff3>>rs3) > >> .endm > >> + > >> +/* > >> + * Compute the address of the current CPU's entry in sleep_save_stash, > >> + * i.e. &sleep_save_stash[hash(MPIDR_EL1)]. > >> + * > >> + * @slot: output register > >> + * > >> + * Clobbers: x2 - x8 > >> + */ > >> + .macro get_sleep_stash_slot slot > >> + mpidr_hash_assert_distinct \slot, x2 > >> + mrs x3, mpidr_el1 > >> + adr_l x2, mpidr_hash > >> + ldr x8, [x2, #MPIDR_HASH_MASK] > >> + /* > >> + * Following code relies on the struct mpidr_hash > >> + * members size. > >> + */ > >> + ldp w4, w5, [x2, #MPIDR_HASH_SHIFTS] > >> + ldp w6, w7, [x2, #(MPIDR_HASH_SHIFTS + 8)] > >> + compute_mpidr_hash x2, x4, x5, x6, x7, x3, x8 > >> + ldr_l \slot, sleep_save_stash > >> + add \slot, \slot, x2, lsl #3 > >> + .endm > > > >I think this would now be the only user of compute_mpidr_hash, so it's > >probably better to inline that macro here and then we don't need to > >bother with mpidr_hash_assert_distinct at all (i.e. your first patch > >isn't needed). > > > >Will > > > > > Will! What do you think of this? I think it's been mangled by your mail client. Please just send a v2 and I'll get to it on the next pass through my inbox (which is an unholy mess right now). Will