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From: Thomas Gleixner <tglx@linutronix.de>
To: Marc Kleine-Budde <mkl@pengutronix.de>
Cc: LKML <linux-kernel@vger.kernel.org>,
	Wolfgang Grandegger <wg@grandegger.com>,
	Markus Pargmann <mpa@pengutronix.de>,
	Benedikt Spranger <b.spranger@linutronix.de>,
	linux-can@vger.kernel.org, netdev@vger.kernel.org
Subject: Re: [patch 03/12] can: c_can: Make it SMP safe
Date: Tue, 18 Mar 2014 20:40:10 +0100 (CET)	[thread overview]
Message-ID: <alpine.DEB.2.02.1403182037580.18573@ionos.tec.linutronix.de> (raw)
In-Reply-To: <5328947F.7070902@pengutronix.de>

On Tue, 18 Mar 2014, Marc Kleine-Budde wrote:

> On 03/18/2014 06:19 PM, Thomas Gleixner wrote:
> > The hardware has two message control interfaces, but the code only
> > uses the first one. So on SMP the following can be observed:
> > 
> > CPU0 	       	CPU1
> > rx_poll()
> >   write IF1	xmit()
> > 		write IF1
> >   write IF1			
> > 
> > That results in corrupted message object configurations. The TX/RX is
> > not globally serialized it's only serialized on a core.
> > 
> > Simple solution: Let RX use IF1 and TX use IF2 and all is good.
> 
> Do both c_can and d_can have two control interfaces?

According to the manual it has.

Thanks,

	tglx

  reply	other threads:[~2014-03-18 19:40 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-18 17:19 [patch 00/12] can: c_can: Fix a series of serious bugs and improve the performance Thomas Gleixner
2014-03-18 17:19 ` [patch 01/12] can: c_can: Wait for CONTROL_INIT to be cleared Thomas Gleixner
2014-03-18 18:11   ` Marc Kleine-Budde
2014-03-18 18:19     ` Thomas Gleixner
2014-03-18 17:19 ` [patch 02/12] can: c_can: Fix hardware raminit function Thomas Gleixner
2014-03-18 18:38   ` Marc Kleine-Budde
2014-03-18 22:15     ` Thomas Gleixner
2014-03-19  6:37       ` Oliver Hartkopp
2014-03-19  9:22         ` Thomas Gleixner
2014-03-18 17:19 ` [patch 03/12] can: c_can: Make it SMP safe Thomas Gleixner
2014-03-18 18:46   ` Marc Kleine-Budde
2014-03-18 19:40     ` Thomas Gleixner [this message]
2014-03-18 17:19 ` [patch 04/12] can: c_can: Fix buffer ordering for real Thomas Gleixner
2014-03-18 17:19 ` [patch 05/12] can: c_can: Fix the lost message handling Thomas Gleixner
2014-03-18 17:19 ` [patch 06/12] can: c_can: Remove braindamaged EOB exit Thomas Gleixner
2014-03-18 17:19 ` [patch 07/12] can: c_can: Provide protection in the xmit path Thomas Gleixner
2014-03-18 17:19 ` [patch 08/12] can: c_can: Makethe code readable Thomas Gleixner
2014-03-18 17:37   ` Joe Perches
2014-03-18 18:23     ` Thomas Gleixner
2014-03-18 18:27     ` [patch 08/12 V2] " Thomas Gleixner
2014-03-18 19:20       ` Joe Perches
2014-03-18 17:19 ` [patch 09/12] can: c_can: Reduce register access for real Thomas Gleixner
2014-03-18 17:19 ` [patch 10/12] can: c_can: Store dlc private Thomas Gleixner
2014-03-18 17:19 ` [patch 11/12] can: c_can: Simplify TX interrupt cleanup Thomas Gleixner
2014-03-18 17:19 ` [patch 12/12] can: c_can: Avoid led toggling for every packet Thomas Gleixner
2014-03-18 20:18   ` can: c_can: Reduce interrupt load by 50% Thomas Gleixner
2014-03-18 20:35     ` Joe Perches
2014-03-18 20:43       ` Thomas Gleixner
2014-03-18 21:27         ` Joe Perches
2014-03-31 22:35 ` [patch 00/12] can: c_can: Fix a series of serious bugs and improve the performance Thomas Gleixner
2014-04-01  8:09   ` Marc Kleine-Budde
2014-04-01  9:07     ` Thomas Gleixner
2014-04-01  9:09       ` Marc Kleine-Budde
2014-04-01 21:29     ` Marc Kleine-Budde

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