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From: atull <atull@opensource.altera.com>
To: Pavel Machek <pavel@denx.de>
Cc: <gregkh@linuxfoundation.org>, <jgunthorpe@obsidianresearch.com>,
	<hpa@zytor.com>, <monstr@monstr.eu>, <michal.simek@xilinx.com>,
	<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<pantelis.antoniou@konsulko.com>, <robh+dt@kernel.org>,
	<grant.likely@linaro.org>, <broonie@kernel.org>,
	<philip@balister.org>, <rubini@gnudd.com>,
	<s.trumtrar@pengutronix.de>, <jason@lakedaemon.net>,
	<kyle.teske@ni.com>, <nico@linaro.org>, <balbi@ti.com>,
	<m.chehab@samsung.com>, <davidb@codeaurora.org>,
	<rob@landley.net>, <davem@davemloft.net>, <cesarb@cesarb.net>,
	<sameo@linux.intel.com>, <akpm@linux-foundation.org>,
	<linus.walleij@linaro.org>, <delicious.quinoa@gmail.com>,
	<dinguyen@opensource.altera.com>,
	<yvanderv@opensource.altera.com>
Subject: Re: [PATCH 0/3] Yet another stab at a fpga framework
Date: Mon, 8 Sep 2014 16:00:54 -0500	[thread overview]
Message-ID: <alpine.DEB.2.02.1409081559320.3201@atx-linux-37> (raw)
In-Reply-To: <20140907185700.GA26553@amd>

On Sun, 7 Sep 2014, Pavel Machek wrote:

> Hi!
> 
> > [resend with fixed email settings]
> > 
> > The idea of the framework is to provide consistent ways of
> > programming raw images into FPGA's.
> > 
> > Programming from device tree overlays is supported.
> > 
> > The core (fpga-mgr.c) does not include a userspace interface
> > and just exports kernel functions.
> > 
> > This approach separates the core from the interfaces.
> > 
> > Each interface can be enabled or disabled in the defconfig.
> > In some production contexts, interfaces that might be used
> > during development can be disabled.
> > 
> > The core exports kernel functions to:
> >   * write the fpga from a buffer or using the firmware layer
> >   * get fpga status
> >   * find a particular fpga manager from a device tree phandle
> >   * register/unregister lower level fpga drivers.
> > 
> > The bus allows us to:
> >   * program fpga from a device tree overlay using firmware.
> >   * automatically reload firmware and reprogram fpga during resume.
> > 
> > The sysfs interface:
> >   * read only, get the name and status of fpga manager.
> > 
> > I have a configfs interface patch which I haven't included,
> > adds configfs as a separate file.
> 
> Thanks for the patches... is there new version? Is that corresponding
> socfpga code?
> 
> I'd like to configure fpga with .rbf file on board similar to SocKit.
> 
> Thanks,
> 								Pavel

Yes, hopefully next week.

Regards,
Alan


> 
> -- 
> (english) http://www.livejournal.com/~pavelmachek
> (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
> 

      reply	other threads:[~2014-09-08 21:39 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-08-01 22:28 atull
2014-08-01 22:28 ` [PATCH 1/3] fpga manager framework core atull
2014-08-02  0:15   ` Pavel Machek
2014-08-02  0:18   ` Pavel Machek
2014-08-01 22:28 ` [PATCH 2/3] fpga bus driver atull
2014-08-02  0:23   ` Pavel Machek
2014-08-05 18:21   ` Pantelis Antoniou
2014-08-01 22:28 ` [PATCH 3/3] fpga sysfs interface atull
2014-08-02  0:25   ` Pavel Machek
2014-08-05 18:18 ` [PATCH 0/3] Yet another stab at a fpga framework Pantelis Antoniou
2014-09-07 18:57 ` Pavel Machek
2014-09-08 21:00   ` atull [this message]

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