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From: Thomas Gleixner <tglx@linutronix.de>
To: Vikas Shivappa <vikas.shivappa@intel.com>
Cc: Vikas Shivappa <vikas.shivappa@linux.intel.com>,
	linux-kernel@vger.kernel.org, hpa@zytor.com, mingo@kernel.org,
	tj@kernel.org, matt.flemming@intel.com, will.auld@intel.com,
	peterz@infradead.org
Subject: Re: [PATCH] x86: Intel Cache Allocation Technology support
Date: Sun, 23 Nov 2014 21:04:50 +0100 (CET)	[thread overview]
Message-ID: <alpine.DEB.2.11.1411232057470.6439@nanos> (raw)
In-Reply-To: <alpine.DEB.2.10.1411211123150.30781@vshiva-Udesk>

On Fri, 21 Nov 2014, Vikas Shivappa wrote:
> On Fri, 21 Nov 2014, Thomas Gleixner wrote:
> > On Wed, 19 Nov 2014, Vikas Shivappa wrote:
> > > +	rdmsr(IA32_PQR_ASSOC, l, h);
> > 
> > Why on earth do we want to read an MSR on every context switch? What's
> > wrong with having
> > 
> > DEFINE_PER_CPU(u64, cacheqe_pqr);
> > 
> > 	u64 next_pqr, cur_pqr = this_cpu_read(cacheqe_pqr);
> > 
> > 	cq = task_cacheqe(task);
> > 	next_pqr = cq ? cq->pqr : 0;
> > 
> > 	if (next_pqr != cur_pqr) {
> > 	   	wrmsrl(IA32_PQR_ASSOC, next_pqr);
> 
> when cqm(cache monitoring) and cqe are both running together , cant corrupt
> the low 32 bits, the rdmsr was a fix for that.
> If there are better alternatives at low cost , certainly acceptable

Sure there are. If cache monitoring and this runs together then they
should better synchronize the cached PQR bits for the current cpu
instead of enforcing useless MSR reads into the hot path.

What you provided is certainly unacceptable.
 
> > > +/* Create a new cacheqe cgroup.*/
> > > +static struct cgroup_subsys_state *
> > > +cqe_css_alloc(struct cgroup_subsys_state *parent_css)
> > > +{
> > > +	struct cacheqe *parent = css_cacheqe(parent_css);
> > > +	struct cacheqe *cq;
> > > +
> > > +	/* This is the call before the feature is detected */
> > 
> > Huch? We know at early boot that this is available. So why do you need
> > this? The first call to this should never happen before the whole
> > thing is initialized. If it happens, it's a design failure.
> > 
> > > +	if (!parent) {
> > > +		root_cqe_group.clos = 0;
> > > +		return &root_cqe_group.css;
> > > +	}
> > > +
> > > +	/* To check if cqe is enabled.*/
> > > +	if (!cqe_genable)
> > > +		return ERR_PTR(-ENODEV);
> > 
> > So we first check for !parent and return &root_cqe_group.css and later
> > we return an error pointer? Really consistent behaviour.
> 
> this is due to how the cgroup init works.

Sorry, I can't follow that argument. Why enforces the cgroup init this
inconsistency? Why is cgroup init BEFORE we detect the feature?
 
Thanks,

	tglx

  parent reply	other threads:[~2014-11-23 20:04 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-20  1:05 Vikas Shivappa
2014-11-21 14:19 ` Thomas Gleixner
2014-11-21 20:00   ` Vikas Shivappa
2014-11-21 20:15     ` Borislav Petkov
2014-11-21 21:14       ` Vikas Shivappa
2014-11-23 20:04     ` Thomas Gleixner [this message]
2014-11-24  9:36       ` Shivappa, Vikas
2014-11-23 19:26   ` Matt Fleming
2014-11-23 19:29     ` Thomas Gleixner
2014-11-24  9:44   ` Shivappa, Vikas
2014-11-26  0:01   ` Shivappa, Vikas
2014-11-26  0:05   ` Shivappa, Vikas
2014-11-21 20:29 ` Dave Hansen
2014-11-21 20:43   ` Thomas Gleixner
2014-11-21 21:27     ` Vikas Shivappa
2014-11-21 21:25 ` Vikas Shivappa

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