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From: Thomas Gleixner <tglx@linutronix.de>
To: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Nicolas Pitre <nicolas.pitre@linaro.org>
Subject: Re: [question] on which cpu an interrupt controller will raise an irq ?
Date: Wed, 10 Dec 2014 17:22:02 +0100 (CET)	[thread overview]
Message-ID: <alpine.DEB.2.11.1412101721070.13233@nanos> (raw)
In-Reply-To: <5484BBC8.7080304@linaro.org>

On Sun, 7 Dec 2014, Daniel Lezcano wrote:
> I am not very familiar with the interrupt subsystem, so sorry if this sounds a
> stupid question.
> 
> IIUC, when a interrupt happens on a SMP system and if there is no affinity set
> for it, it is delivered following a scheme decided by the interrupt
> controller.
> 
> For example, for the APIC, there is a round robin behaviour, so an interrupt
> will be raised on cpu0, then cpu1, and so on ...
> 
> Is there a way to know on which cpu a controller will raise the interrupt ?

No generic way which would allow to predict it on every controller we
support.

Thanks,

	tglx

      reply	other threads:[~2014-12-10 16:22 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-07 20:42 Daniel Lezcano
2014-12-10 16:22 ` Thomas Gleixner [this message]

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