From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755747AbbGFNY2 (ORCPT ); Mon, 6 Jul 2015 09:24:28 -0400 Received: from www.linutronix.de ([62.245.132.108]:55080 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755662AbbGFNYV (ORCPT ); Mon, 6 Jul 2015 09:24:21 -0400 Date: Mon, 6 Jul 2015 15:24:12 +0200 (CEST) From: Thomas Gleixner To: Jisheng Zhang cc: Sebastian Hesselbarth , Mark Rutland , Jason Cooper , LKML Subject: Re: [patch] irqchip/dw-apb-ictl: Fix generic domain chip wreckage In-Reply-To: <20150706210411.6ee1cbe0@xhacker> Message-ID: References: <20150706101543.373582262@linutronix.de> <20150706200736.3f8ef2b0@xhacker> <20150706203130.15404ad5@xhacker> <20150706210411.6ee1cbe0@xhacker> User-Agent: Alpine 2.11 (DEB 23 2013-08-11) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001,URIBL_BLOCKED=0.001 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 6 Jul 2015, Jisheng Zhang wrote: > On Mon, 6 Jul 2015 14:55:43 +0200 > Thomas Gleixner wrote: > > > On Mon, 6 Jul 2015, Thomas Gleixner wrote: > > > On Mon, 6 Jul 2015, Jisheng Zhang wrote: > > > > > Thomas Gleixner wrote: > > > > the following patch seems fix the panic, but I dunno whether it's correct or not, > > > > could you please help to check? > > > > > > > > Thanks, > > > > Jisheng > > > > > > > > diff --git a/drivers/irqchip/irq-dw-apb-ictl.c b/drivers/irqchip/irq-dw-apb-ictl.c > > > > index f4a0e11..8d996cb 100644 > > > > --- a/drivers/irqchip/irq-dw-apb-ictl.c > > > > +++ b/drivers/irqchip/irq-dw-apb-ictl.c > > > > @@ -30,13 +30,14 @@ > > > > static void dw_apb_ictl_handler(unsigned int irq, struct irq_desc *desc) > > > > { > > > > struct irq_domain *d = irq_desc_get_handler_data(desc); > > > > - struct irq_chip_generic *gc = irq_get_domain_generic_chip(d, 0); > > > > + struct irq_chip_generic *gc; > > > > struct irq_chip *chip = irq_desc_get_chip(desc); > > > > int n; > > > > > > > > chained_irq_enter(chip, desc); > > > > > > > > - for (n = 0; n < d->gc->num_chips; n++, gc++) { > > > > + for (n = 0; n < d->gc->num_chips; n++) { > > > > + gc = irq_get_domain_generic_chip(d, n * 32); > > > > u32 stat = readl_relaxed(gc->reg_base + APB_INT_FINALSTATUS_L); > > > > > > Yes it's correct. Seems I tried to be overly clever by avoiding the > > > lookup of the second chip. Will fold back. > > > > Hmm. That does not make sense because the real issue is here: > > > > - for (i = 0; i < nrirqs / 32; i++) { > > + for (i = 0; i < DIV_ROUND_UP(nrirqs, 32); i++) { > > > > OOPS, we need the above DIV_ROUND_UP fix. But... > > On Berlin SoC, nrirqs = 64, so it doesn't make difference and we get the same > panic. Yes, that's right. irq_domain_chip_generic->gc is an array of pointers, not an array of generic chips. Stupid me... Thanks, tglx