From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752474AbbGNIQs (ORCPT ); Tue, 14 Jul 2015 04:16:48 -0400 Received: from www.linutronix.de ([62.245.132.108]:58237 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751793AbbGNIQq (ORCPT ); Tue, 14 Jul 2015 04:16:46 -0400 Date: Tue, 14 Jul 2015 10:16:37 +0200 (CEST) From: Thomas Gleixner To: Manuel Lauss cc: LKML , Ralf Baechle , Jiang Liu , Linux-MIPS Subject: Re: [patch 08/12] MIPS/alchemy: Remove pointless irqdisable/enable In-Reply-To: Message-ID: References: <20150713200602.799079101@linutronix.de> <20150713200715.113667554@linutronix.de> User-Agent: Alpine 2.11 (DEB 23 2013-08-11) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001,URIBL_BLOCKED=0.001 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 14 Jul 2015, Manuel Lauss wrote: > On Mon, Jul 13, 2015 at 10:46 PM, Thomas Gleixner wrote: > > bcsr_csc_handler() is a cascading interrupt handler. It has a > > disable_irq_nosync()/enable_irq() pair around the generic_handle_irq() > > call. The value of this disable/enable is zero because its a complete > > noop: > > > > disable_irq_nosync() merily increments the disable count without > > actually masking the interrupt. enable_irq() soleley decrements the > > disable count without touching the interrupt chip. The interrupt > > cannot arrive again because the complete call chain runs with > > interrupts disabled. > > > > Remove it. > > Is there another patch this one depends on? The DB1300 board doesn't No. > boot (i.e. interrupts from the cpld aren't serviced) with this patch applied: > (irq 136 is the first serviced by the bcsr cpld): > > irq 136: nobody cared (try booting with the "irqpoll" option) That's weird. Looking deeper, enable_irq() actually calls chip->unmask() unconditionally. So it seems the chip is sensitive to that. Does the following patch on top fix things again? Thanks, tglx ---- diff --git a/arch/mips/alchemy/devboards/bcsr.c b/arch/mips/alchemy/devboards/bcsr.c index 3a24f2d6ecfd..ec47abe580c6 100644 --- a/arch/mips/alchemy/devboards/bcsr.c +++ b/arch/mips/alchemy/devboards/bcsr.c @@ -88,8 +88,11 @@ EXPORT_SYMBOL_GPL(bcsr_mod); static void bcsr_csc_handler(unsigned int irq, struct irq_desc *d) { unsigned short bisr = __raw_readw(bcsr_virt + BCSR_REG_INTSTAT); + struct irq_chip *chip = irq_desc_get_chip(d); + chained_irq_enter(chip, d); generic_handle_irq(bcsr_csc_base + __ffs(bisr)); + chained_irq_exit(chip, d); } static void bcsr_irq_mask(struct irq_data *d)