From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752336AbbJMG4R (ORCPT ); Tue, 13 Oct 2015 02:56:17 -0400 Received: from www.linutronix.de ([62.245.132.108]:48276 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751914AbbJMG4Q (ORCPT ); Tue, 13 Oct 2015 02:56:16 -0400 Date: Tue, 13 Oct 2015 08:55:35 +0200 (CEST) From: Thomas Gleixner To: "majun (F)" cc: Marc Zyngier , Catalin.Marinas@arm.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Will.Deacon@arm.com, mark.rutland@arm.com, jason@lakedaemon.net, lizefan@huawei.com, huxinwei@huawei.com, dingtianhong@huawei.com, zhaojunhua@hisilicon.com, liguozhu@hisilicon.com, xuwei5@hisilicon.com, wei.chenwei@hisilicon.com, guohanjun@huawei.com, wuyun.wu@huawei.com, guodong.xu@linaro.org, haojian.zhuang@linaro.org, zhangfei.gao@linaro.org, usman.ahmad@linaro.org, klimov.linux@gmail.com Subject: Re: [PATCH v5 1/3] initialize each mbigen device node as a interrupt controller. In-Reply-To: <561CA58C.2060207@huawei.com> Message-ID: References: <1443605949-15396-1-git-send-email-majun258@huawei.com> <1443605949-15396-2-git-send-email-majun258@huawei.com> <5610D3BD.1040408@huawei.com> <5618D3EC.6050501@huawei.com> <20151010110942.52d34a4b@arm.com> <20151011120331.09093ffc@arm.com> <561CA58C.2060207@huawei.com> User-Agent: Alpine 2.11 (DEB 23 2013-08-11) MIME-Version: 1.0 Content-Type: MULTIPART/MIXED; BOUNDARY="8323329-1164119949-1444719034=:6097" Content-ID: X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-1164119949-1444719034=:6097 Content-Type: TEXT/PLAIN; CHARSET=ISO-2022-JP Content-ID: Majun, On Tue, 13 Oct 2015, majun (F) wrote: > 在 2015/10/12 0:45, Thomas Gleixner 写道: > > So now in the mbigen case this looks like this: > > > > [MSI-BUS] ----- [MBIGEN]<-------------------[Device interrupt] > > > > Again, you have a 'wire' from the device to the MSI unit (MBIGEN) and > > we do not care about that 'wire' either. What we care about is how we > > find the MSI (mbigen) configuration registers for a particular > > device. So we need a DT/ACPI entry which describes those configuration > > registers and whatever supplementary information is required. That > > will make the mbigen driver extremly simple. > > > > According to your suggestions, I tried to make the hardware structure likes below: > > device(8250 uart) -> mbigne -> ITS-pMSI --> ITS --> GIC I'm not sure whether mbigen should be connected to ITS-pMSI (I assume you mean ITS-PCI-MSI). mbigen is a seperate MSI domain, so it should connect to ITS, but I leave that to Marc. > And 8250 uart dts node is: > > 8250_uart { > compatible = "xxx"; > msi-parent = < &mbigen>; > config_addr = ; /* configuration register */ > interrupts = ; > interrupt-parent = ? > } > > My question is what's the interrupt-parent should be? There is no interrupt parent for 8250_uart. Why would you want that? I'm really not a DT expert, but I think you want something like this: 8250_uart { compatible = "xxx"; msi-parent = < &mbigen_node5>; interrupt-map = <&mbigen5 0>; }; and then have mbigen_node5 { ... reg = <....>; }; So the other devices which are connected to mbigen_node5 have the same msi-parent. But then again, please discuss that with Marc and the DT wizards. Thanks, tglx --8323329-1164119949-1444719034=:6097--