From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758277AbcEFJ4q (ORCPT ); Fri, 6 May 2016 05:56:46 -0400 Received: from www.linutronix.de ([62.245.132.108]:58528 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757596AbcEFJ4p (ORCPT ); Fri, 6 May 2016 05:56:45 -0400 Date: Fri, 6 May 2016 11:54:53 +0200 (CEST) From: Thomas Gleixner To: hchrzani cc: lukasz.anaczkowski@intel.com, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, peterz@infradead.org, kan.liang@intel.com, vthakkar1994@gmail.com, bp@suse.de, harish.chegondi@intel.com, izumi.taku@jp.fujitsu.com, linux-kernel@vger.kernel.org, Lawrence F Meadows Subject: Re: [PATCH] perf/x86/intel/uncore: Fix CHA registers configuration procedure for Knights Landing platform In-Reply-To: <1462525171-14643-1-git-send-email-hubert.chrzaniuk@intel.com> Message-ID: References: <1462525171-14643-1-git-send-email-hubert.chrzaniuk@intel.com> User-Agent: Alpine 2.11 (DEB 23 2013-08-11) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001,URIBL_BLOCKED=0.001 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 6 May 2016, hchrzani wrote: > CHA events in Knights Landing platform require programming filter registers properly. > Before change, code lacked mandatory bitset operations for reserved bits. > As a result some events were not counted. > > Fixes: 77af003 ('perf/x86/intel/uncore: Add Knights Landing uncore PMU support') > Signed-off-by: Hubert Chrzaniuk > Signed-off-by: Lawrence F Meadows > --- > arch/x86/events/intel/uncore_snbep.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c > index ab2bcaa..47d7216 100644 > --- a/arch/x86/events/intel/uncore_snbep.c > +++ b/arch/x86/events/intel/uncore_snbep.c > @@ -1902,6 +1902,7 @@ static int knl_cha_hw_config(struct intel_uncore_box *box, > reg1->reg = HSWEP_C0_MSR_PMON_BOX_FILTER0 + > KNL_CHA_MSR_OFFSET * box->pmu->pmu_idx; > reg1->config = event->attr.config1 & knl_cha_filter_mask(idx); > + reg1->config |= 0x23ull << 32; Please use proper defines and not some magic hex constants. Thanks, tglx