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Date: Thu, 19 May 2016 11:21:22 +0200 (CEST)
From: Thomas Gleixner <tglx@linutronix.de>
To: Paul Burton <paul.burton@imgtec.com>
cc: linux-mips@linux-mips.org, Ralf Baechle <ralf@linux-mips.org>,
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        Marc Zyngier <marc.zyngier@arm.com>
Subject: Re: [PATCH 0/3] External Interrupt Controller (EIC) fixes
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On Tue, 17 May 2016, Paul Burton wrote:

> This series fixes a few small issues with support for External Interrupt
> Controllers (cpu_has_veic), ensuring that it is configured to service
> all interrupts by default & that when a GIC is present it's enabled when
> expected.
> 
> Applies atop v4.6.
> 
> Paul Burton (3):
>   MIPS: Clear Status IPL field when using EIC
>   MIPS: smp-cps: Clear Status IPL field when using EIC
>   irqchip: mips-gic: Setup EIC mode on each CPU if it's in use

I was not on CC for patch 1/3 and I assume this should go through one
tree. Ralf, can you pick that up with my acked-by for the irqchip change?

Thanks,

	tglx