From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755342AbcFQHuY (ORCPT ); Fri, 17 Jun 2016 03:50:24 -0400 Received: from www.linutronix.de ([62.245.132.108]:48978 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754485AbcFQHuV (ORCPT ); Fri, 17 Jun 2016 03:50:21 -0400 Date: Fri, 17 Jun 2016 09:48:13 +0200 (CEST) From: Thomas Gleixner To: Bin Gao cc: Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, LKML , bin.gao@intel.com, John Stultz Subject: Re: x86/tsc: Set X86_FEATURE_TSC_RELIABLE to skip refined calibration In-Reply-To: <20160616231002.GA95072@worksta> Message-ID: References: <20160616231002.GA95072@worksta> User-Agent: Alpine 2.11 (DEB 23 2013-08-11) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 16 Jun 2016, Bin Gao wrote: > Unlike PIT based calibration which counts TSC cycles against another timer, > MSR or CPUID method has no calibration - it simply multiplies the known > frequency of a timer by a ratio. So TSC frequency computed by MSR or CPUID > is the final frequency and doesn't need the refined calibration process. > We used to use set_cpu_cap(&boot_cpu_data, X86_FEATURE_TSC_RELIABLE) but > it actually doesn't skip refined calibration because the flag is cleared > later in identify_cpu(). A cpu caps flag is not cleared only if it's set > by setup_force_cpu_cap(). This patch sets the flag in tsc_msr.c and > replaces set_cpu_cap() with setup_force_cpu_cap() in other files. I'm not entirely sure that this is correct. At least I want to know John Stultz's opinion on that. Thanks, tglx