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Date: Wed, 13 Jul 2016 12:25:39 +0200 (CEST)
From: Thomas Gleixner <tglx@linutronix.de>
To: Fenghua Yu <fenghua.yu@intel.com>
cc: Ingo Molnar <mingo@elte.hu>, "H. Peter Anvin" <h.peter.anvin@intel.com>,
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        David Carrillo-Cisneros <davidcc@google.com>,
        Ravi V Shankar <ravi.v.shankar@intel.com>,
        Vikas Shivappa <vikas.shivappa@linux.intel.com>,
        Sai Prakhya <sai.praneeth.prakhya@intel.com>,
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Subject: Re: [PATCH 08/32] Define CONFIG_INTEL_RDT
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On Tue, 12 Jul 2016, Fenghua Yu wrote:

Subject: Define CONFIG_INTEL_RDT

That does not qualify as a proper patch subject

> From: Vikas Shivappa <vikas.shivappa@linux.intel.com>
> 
> CONFIG_INTEL_RDT is defined. 

That tells us what?

> --- a/arch/x86/include/asm/intel_rdt.h
> +++ b/arch/x86/include/asm/intel_rdt.h
> @@ -24,8 +24,16 @@ struct clos_cbm_table {
>   * on scheduler hot path:
>   * - This will stay as no-op unless we are running on an Intel SKU
>   * which supports L3 cache allocation.
> + * - When support is present and enabled, does not do any
> + * IA32_PQR_MSR writes until the user starts really using the feature
> + * ie creates a rdtgroup directory and assigns a cache_mask thats
> + * different from the root rdtgroup's cache_mask.
>   * - Caches the per cpu CLOSid values and does the MSR write only
> - * when a task with a different CLOSid is scheduled in.
> + * when a task with a different CLOSid is scheduled in. That
> + * means the task belongs to a different rdtgroup.
> + * - Closids are allocated so that different rdtgroup directories
> + * with same cache_mask gets the same CLOSid. This minimizes CLOSids
> + * used and reduces MSR write frequency.

How is this and the following changes related to $subject ?

Thanks,

	tglx