From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754234AbcGZNIP (ORCPT ); Tue, 26 Jul 2016 09:08:15 -0400 Received: from Galois.linutronix.de ([146.0.238.70]:43399 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751906AbcGZNIM (ORCPT ); Tue, 26 Jul 2016 09:08:12 -0400 Date: Tue, 26 Jul 2016 15:05:59 +0200 (CEST) From: Thomas Gleixner To: Bjorn Helgaas cc: Marc Zyngier , Bjorn Helgaas , Bharat Kumar Gogada , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] genirq/msi: Make sure PCI MSIs are activated early In-Reply-To: Message-ID: References: <1468426713-31431-1-git-send-email-marc.zyngier@arm.com> <20160722220440.GC32142@localhost> <20160725144702.GA12484@localhost> User-Agent: Alpine 2.11 (DEB 23 2013-08-11) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 26 Jul 2016, Thomas Gleixner wrote: > On Mon, 25 Jul 2016, Bjorn Helgaas wrote: > > On Mon, Jul 25, 2016 at 09:45:13AM +0200, Thomas Gleixner wrote: > > I thought the original issue [1] was that PCI_MSI_FLAGS_ENABLE was being > > written before PCI_MSI_ADDRESS_LO. That doesn't sound like a good > > idea to me. > > Well. That's only a problem if the PCI device does not support masking. But > yes, we missed that case back then. > > > That does seem like a problem. Maybe it would be better to delay > > setting PCI_MSI_FLAGS_ENABLE until after the MSI address & data bits > > have been set? > > I thought about that, but that gets ugly pretty fast. Here is an alternative > solution. > > I think that's the proper place to do it _AFTER_ the hierarchical allocation > took place. On x86 Marc's ACTIVATE_EARLY flag would not work because the > message is not yet ready to be assembled. Actually it works, because the MSI domain is the last one which is running the allocation function. So everything else is initialized already. I'll take Marc's patch with some additional commentry as it turned out to be a workaround for the reported VMware issues with PCI/MSI-X pass through. Thanks, tglx