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Date: Thu, 8 Sep 2016 12:34:25 +0200 (CEST)
From: Thomas Gleixner <tglx@linutronix.de>
To: Fenghua Yu <fenghua.yu@intel.com>
cc: "H. Peter Anvin" <h.peter.anvin@intel.com>,
        Ingo Molnar <mingo@elte.hu>, Tony Luck <tony.luck@intel.com>,
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        Sai Prakhya <sai.praneeth.prakhya@intel.com>,
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Subject: Re: [PATCH v2 17/33] x86/intel_rdt: Hot cpu update for code data
 prioritization
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On Thu, 8 Sep 2016, Fenghua Yu wrote:
> Updates hot cpu notification handling for code data prioritization(cdp).

Some more useless information

> The capacity bitmask(cbm) is global for both data and instruction and we
> need to update the new online package with all the cbms by writing to
> the IA32_L3_QOS_n MSRs.

If I wouldn't know the details of the hardware then this explanation would
make me run away screaming ....

> +static void cbm_update_msr(u32 index)
> +{
> +	struct rdt_remote_data info;
> +	int dindex;
> +
> +	dindex = DCBM_TABLE_INDEX(index);
> +	if (cctable[dindex].clos_refcnt) {
> +
> +		info.msr = CBM_FROM_INDEX(dindex);
> +		info.val = cctable[dindex].cbm;
> +		msr_cpu_update((void *) &info);
> +
> +		if (cdp_enabled) {
> +			info.msr = __ICBM_MSR_INDEX(index);
> +			info.val = cctable[dindex + 1].cbm;
> +			msr_cpu_update((void *) &info);
> +		}
> +	}

As usual there is a complete lack of comments here.

> +}
> +
>  /*
>   * cbm_update_msrs() - Updates all the existing IA32_L3_MASK_n MSRs
>   * which are one per CLOSid on the current package.
> @@ -230,15 +250,10 @@ static inline bool rdt_cpumask_update(int cpu)
>  static void cbm_update_msrs(void *dummy)
>  {
>  	int maxid = cconfig.max_closid;
> -	struct rdt_remote_data info;
>  	unsigned int i;
>  
>  	for (i = 0; i < maxid; i++) {
> -		if (cctable[i].clos_refcnt) {
> -			info.msr = CBM_FROM_INDEX(i);
> -			info.val = cctable[i].cbm;
> -			msr_cpu_update((void *) &info);
> -		}
> +		cbm_update_msr(i);
>  	}

The curly braces can go as well.

Thanks,

	tglx