From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934899AbcJHMpH (ORCPT ); Sat, 8 Oct 2016 08:45:07 -0400 Received: from Galois.linutronix.de ([146.0.238.70]:46241 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751201AbcJHMpA (ORCPT ); Sat, 8 Oct 2016 08:45:00 -0400 Date: Sat, 8 Oct 2016 14:42:33 +0200 (CEST) From: Thomas Gleixner To: Linus Torvalds cc: LKML , Andrew Morton , Ingo Molnar , "H. Peter Anvin" Subject: [GIT pull] irq updates for 4.9 Message-ID: User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Linus, please pull the latest irq-urgent-for-linus git tree from: git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq-urgent-for-linus Two small kerneldoc fixes from Julia Lawall. Thanks, tglx ------------------> Julia Lawall (2): irqchip/vic: Improve function-level documentation irqchip/metag-ext: Improve function-level documentation drivers/irqchip/irq-metag-ext.c | 1 - drivers/irqchip/irq-vic.c | 1 - 2 files changed, 2 deletions(-) diff --git a/drivers/irqchip/irq-metag-ext.c b/drivers/irqchip/irq-metag-ext.c index 8c38b3d92e1c..0cdd923d1535 100644 --- a/drivers/irqchip/irq-metag-ext.c +++ b/drivers/irqchip/irq-metag-ext.c @@ -436,7 +436,6 @@ static int meta_intc_irq_set_type(struct irq_data *data, unsigned int flow_type) /** * meta_intc_irq_demux() - external irq de-multiplexer - * @irq: the virtual interrupt number * @desc: the interrupt description structure for this irq * * The cpu receives an interrupt on TR2 when a SoC interrupt has occurred. It is diff --git a/drivers/irqchip/irq-vic.c b/drivers/irqchip/irq-vic.c index f811a7de5857..74192f62dd67 100644 --- a/drivers/irqchip/irq-vic.c +++ b/drivers/irqchip/irq-vic.c @@ -498,7 +498,6 @@ void __init vic_init(void __iomem *base, unsigned int irq_start, * vic_init_cascaded() - initialise a cascaded vectored interrupt controller * @base: iomem base address * @parent_irq: the parent IRQ we're cascaded off - * @irq_start: starting interrupt number, must be muliple of 32 * @vic_sources: bitmask of interrupt sources to allow * @resume_sources: bitmask of interrupt sources to allow for resume *