From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756413AbcJMPfa (ORCPT ); Thu, 13 Oct 2016 11:35:30 -0400 Received: from Galois.linutronix.de ([146.0.238.70]:58307 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756345AbcJMPfB (ORCPT ); Thu, 13 Oct 2016 11:35:01 -0400 Date: Thu, 13 Oct 2016 17:32:28 +0200 (CEST) From: Thomas Gleixner To: Grzegorz Andrejczuk cc: mingo@redhat.com, hpa@zytor.com, x86@kernel.org, bp@suse.de, dave.hansen@linux.intel.com, linux-kernel@vger.kernel.org, lukasz.daniluk@intel.com, james.h.cownie@intel.com, jacob.jun.pan@intel.com Subject: Re: [PATCH v3 2/4] Add enabling of the R3 MWAIT during boot for KNL In-Reply-To: <1476367345-25628-3-git-send-email-grzegorz.andrejczuk@intel.com> Message-ID: References: <1476367345-25628-1-git-send-email-grzegorz.andrejczuk@intel.com> <1476367345-25628-3-git-send-email-grzegorz.andrejczuk@intel.com> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 13 Oct 2016, Grzegorz Andrejczuk wrote: > > +static int phi_r3mwait_disabled; __read_mostly please. > + > /* > * Just in case our CPU detection goes bad, or you have a weird system, > * allow a way to override the automatic disabling of MPX. > @@ -61,6 +63,34 @@ void check_mpx_erratum(struct cpuinfo_x86 *c) > } > } > > +static int __init phir3mwait_disable(char *__unused) > +{ > + phi_r3mwait_disabled = 1; > + > + return 1; > +} > +__setup("phir3mwait=disable", phir3mwait_disable); This needs proper documentation in Documentation/kernel-parameters.txt > +static void __init probe_xeon_phi_r3mwait(struct cpuinfo_x86 *c) > +{ > + if (phi_r3mwait_disabled) > + return; > + > + /* > + * Setting ring 3 MONITOR/MWAIT for all threads > + * when CPU is Xeon Phi Family x200 > + * This can be disabled with phir3mwait=disable cmdline switch. And why is this information useful in this comment? > + * We preserve the reserved values and set only 2nd bit. This last sentence does not make any sense at all. Thanks, tglx