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From: Thomas Gleixner <tglx@linutronix.de>
To: Kyle Huey <me@kylehuey.com>
Cc: Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
	x86@kernel.org, linux-kernel@vger.kernel.org,
	"Robert O'Callahan" <robert@ocallahan.org>
Subject: Re: [PATCH] x86: Optimize TIF checking in __switch_to_xtra.
Date: Fri, 9 Dec 2016 17:25:00 +0100 (CET)	[thread overview]
Message-ID: <alpine.DEB.2.20.1612091723170.3423@nanos> (raw)
In-Reply-To: <alpine.DEB.2.20.1612091431280.3794@nanos>

On Fri, 9 Dec 2016, Thomas Gleixner wrote:
> On Tue, 6 Dec 2016, Kyle Huey wrote:
> > I propose the following patch, which results in GCC generating this code:
> > 
> >     mov    (%rsi),%rax
> >     xor    (%rdi),%rax
> >     mov    %rdi,%rbx
> >     mov    %rsi,%r12
> >     test   $0x2000000,%eax
> >     mov    %rax,%rdx
> >     jne    3f
> > 1:  test   $0x10000,%edx
> >     je     2f
> >     /* do some more work */
> > 2:  /* the rest of the function */
> >     ret
> > 3:  /* do work */
> >     mov    (%r12),%rdx
> >     xor    (%rbx),%rdx
> >     jmp    1b
> > 
> > When we are not doing the work controlled by these flags this is significantly
> > better. We only have to load the flags from memory once, and we do a single
> > XOR that we can test multiple times instead of repeatedly isolating bits.
> 
> You rely on the compiler doing the right thing. And it's non obvious from
> the code that this gets optimized as above.

On i386 this creates worse code due to register pressure it seems.

      reply	other threads:[~2016-12-09 16:27 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-06 23:04 Kyle Huey
2016-12-09 16:15 ` Thomas Gleixner
2016-12-09 16:25   ` Thomas Gleixner [this message]

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