From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753055AbdARLo0 (ORCPT ); Wed, 18 Jan 2017 06:44:26 -0500 Received: from Galois.linutronix.de ([146.0.238.70]:49919 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751700AbdARLoY (ORCPT ); Wed, 18 Jan 2017 06:44:24 -0500 Date: Wed, 18 Jan 2017 11:24:50 +0100 (CET) From: Thomas Gleixner To: Andy Shevchenko cc: "Luis R. Rodriguez" , Ingo Molnar , "H . Peter Anvin" , linux-kernel@vger.kernel.org, x86@kernel.org Subject: Re: [PATCH v2 1/1] x86/rtc: Allocate interrupt for platform device In-Reply-To: <1484660404.2133.170.camel@linux.intel.com> Message-ID: References: <20170116172345.3823-1-andriy.shevchenko@linux.intel.com> <20170116190437.GB13946@wotan.suse.de> <1484594499.2133.159.camel@linux.intel.com> <1484660404.2133.170.camel@linux.intel.com> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: multipart/mixed; BOUNDARY="8323329-1241118922-1484733173=:3464" Content-ID: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-1241118922-1484733173=:3464 Content-Type: text/plain; CHARSET=ISO-8859-15 Content-Transfer-Encoding: 8BIT Content-ID: On Tue, 17 Jan 2017, Andy Shevchenko wrote: > On Mon, 2017-01-16 at 22:00 +0100, Thomas Gleixner wrote: > > > The early callback does not work, but we have one which is invoked > > later > > on: x86_init.wallclock_init(). That's invoked after the (IO/APIC) > > setup has > > been completed. See patch below. > > Unfortunately it is till too early. Looks like descriptors are not > available yet and we still can't get an allocation: > > [    0.000000] intel_mid: Failed to allocate RTC interrupt. Disabling > RTC > > ... > > [    0.000000] NR_IRQS:4352 nr_irqs:512 0 Indeed. Did not think about that we need the irq subsystem up not only the primary IOAPIC init done. Looking deeper it's actually simple. MID already overloads the timer_init() setup function. So we can just do it there. Thanks, tglx --- a/arch/x86/platform/intel-mid/intel-mid.c +++ b/arch/x86/platform/intel-mid/intel-mid.c @@ -93,6 +93,17 @@ static void __init intel_mid_setup_bp_ti setup_boot_APIC_clock(); } +static void __init intel_mid_legacy_rtc_init(void) +{ + struct irq_alloc_info info; + + ioapic_set_alloc_attr(&info, NUMA_NO_NODE, 1, 0); + if (mp_map_gsi_to_irq(RTC_IRQ, IOAPIC_MAP_ALLOC, &info) < 0) { + pr_info("Failed to allocate RTC interrupt. Disabling RTC\n"); + x86_platform.legacy.rtc = 0; + } +} + static void __init intel_mid_time_init(void) { sfi_table_parse(SFI_SIG_MTMR, NULL, NULL, sfi_parse_mtmr); @@ -115,6 +126,10 @@ static void __init intel_mid_time_init(v } x86_init.timers.setup_percpu_clockev = apbt_time_init; + + /* If the platform has an RTC make sure the APIC entry is allocated */ + if (x86_platform.legacy.rtc) + intel_mid_legacy_rtc_init(); } static void intel_mid_arch_setup(void) --- a/arch/x86/platform/intel-mid/sfi.c +++ b/arch/x86/platform/intel-mid/sfi.c @@ -540,21 +540,8 @@ static int __init sfi_parse_devs(struct return 0; } -static int __init intel_mid_legacy_rtc_init(void) -{ - struct irq_alloc_info info; - - if (!x86_platform.legacy.rtc) - return -ENODEV; - - ioapic_set_alloc_attr(&info, NUMA_NO_NODE, 1, 0); - return mp_map_gsi_to_irq(RTC_IRQ, IOAPIC_MAP_ALLOC, &info); -} - static int __init intel_mid_platform_init(void) { - intel_mid_legacy_rtc_init(); - sfi_table_parse(SFI_SIG_GPIO, NULL, NULL, sfi_parse_gpio); sfi_table_parse(SFI_SIG_DEVS, NULL, NULL, sfi_parse_devs); return 0; --8323329-1241118922-1484733173=:3464--